From: Mason Yang <masonccyang@mxic.com.tw>
To: broonie@kernel.org, tudor.ambarus@microchip.com,
miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
boris.brezillon@collabora.com, matthias.bgg@gmail.com
Cc: p.yadav@ti.com, juliensu@mxic.com.tw,
linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
linux-spi@vger.kernel.org, Mason Yang <masonccyang@mxic.com.tw>
Subject: [PATCH v3 06/14] mtd: spi-nor: sfdp: get octal mode maximum speed from BFPT
Date: Thu, 28 May 2020 15:58:08 +0800 [thread overview]
Message-ID: <1590652696-8844-7-git-send-email-masonccyang@mxic.com.tw> (raw)
In-Reply-To: <1590652696-8844-1-git-send-email-masonccyang@mxic.com.tw>
Get maximum operation speed of device in octal mode from
BFPT 20th DWORD.
Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
---
drivers/mtd/spi-nor/core.h | 2 ++
drivers/mtd/spi-nor/sfdp.c | 36 ++++++++++++++++++++++++++++++++++++
drivers/mtd/spi-nor/sfdp.h | 4 ++++
3 files changed, 42 insertions(+)
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index de1e391..f644ed1 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -192,6 +192,7 @@ struct spi_nor_locking_ops {
*
* @size: the flash memory density in bytes.
* @page_size: the page size of the SPI NOR flash memory.
+ * @octal_max_speed: maximum operation speed of device in octal mode.
* @hwcaps: describes the read and page program hardware
* capabilities.
* @reads: read capabilities ordered by priority: the higher index
@@ -214,6 +215,7 @@ struct spi_nor_locking_ops {
struct spi_nor_flash_parameter {
u64 size;
u32 page_size;
+ u16 octal_max_speed;
struct spi_nor_hwcaps hwcaps;
struct spi_nor_read_command reads[SNOR_CMD_READ_MAX];
diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c
index 3685a3a..d7ef47a 100644
--- a/drivers/mtd/spi-nor/sfdp.c
+++ b/drivers/mtd/spi-nor/sfdp.c
@@ -4,6 +4,7 @@
* Copyright (C) 2014, Freescale Semiconductor, Inc.
*/
+#include <linux/bitfield.h>
#include <linux/slab.h>
#include <linux/sort.h>
#include <linux/mtd/spi-nor.h>
@@ -26,6 +27,12 @@
#define SFDP_JESD216A_MINOR 5
#define SFDP_JESD216B_MINOR 6
+/* Basic Flash Parameter Table 20th DWORD, Max operation speed of device */
+struct octal_max_speed {
+ u8 idx; /* Bits value */
+ u16 hz; /* MHz */
+};
+
struct sfdp_header {
u32 signature; /* Ox50444653U <=> "SFDP" */
u8 minor;
@@ -440,6 +447,22 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
u32 addr;
u16 half;
u8 erase_mask;
+ static const struct octal_max_speed max_hz[] = {
+ /* Bits value, MHz */
+ { 0x0c, 400 },
+ { 0x0b, 333 },
+ { 0x0a, 266 },
+ { 0x09, 250 },
+ { 0x08, 200 },
+ { 0x07, 166 },
+ { 0x06, 133 },
+ { 0x05, 100 },
+ { 0x04, 80 },
+ { 0x03, 66 },
+ { 0x02, 50 },
+ { 0x01, 33 },
+ };
+ u8 idx;
/* JESD216 Basic Flash Parameter Table length is at least 9 DWORDs. */
if (bfpt_header->length < BFPT_DWORD_MAX_JESD216)
@@ -626,6 +649,19 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
return -ENOTSUPP;
}
+ /* Octal mode max speed */
+ idx = max(FIELD_GET(BFPT_DWORD20_OCTAL_DTR_MAX_SPEED,
+ bfpt.dwords[BFPT_DWORD(20)]),
+ FIELD_GET(BFPT_DWORD20_OCTAL_STR_MAX_SPEED,
+ bfpt.dwords[BFPT_DWORD(20)]));
+
+ for (i = 0; i < ARRAY_SIZE(max_hz); i++) {
+ if (max_hz[i].idx == idx) {
+ params->octal_max_speed = max_hz[i].hz;
+ break;
+ }
+ }
+
return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt, params);
}
diff --git a/drivers/mtd/spi-nor/sfdp.h b/drivers/mtd/spi-nor/sfdp.h
index e15e307..d8ee681 100644
--- a/drivers/mtd/spi-nor/sfdp.h
+++ b/drivers/mtd/spi-nor/sfdp.h
@@ -90,6 +90,10 @@ struct sfdp_bfpt {
#define BFPT_DWORD18_CMD_EXT_RES (0x2UL << 29) /* Reserved */
#define BFPT_DWORD18_CMD_EXT_16B (0x3UL << 29) /* 16-bit opcode */
+#define BFPT_DWORD20_OCTAL_MAX_SPEED_MASK GENMASK(31, 16)
+#define BFPT_DWORD20_OCTAL_DTR_MAX_SPEED GENMASK(31, 28)
+#define BFPT_DWORD20_OCTAL_STR_MAX_SPEED GENMASK(19, 16)
+
struct sfdp_parameter_header {
u8 id_lsb;
u8 minor;
--
1.9.1
next prev parent reply other threads:[~2020-05-28 7:59 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-28 7:58 [PATCH v3 00/14] mtd: spi-nor: add xSPI Octal DTR support Mason Yang
2020-05-28 7:58 ` [PATCH v3 01/14] spi: spi-mem: allow specifying whether an op is DTR or not Mason Yang
2020-05-28 7:58 ` [PATCH v3 02/14] spi: spi-mem: allow specifying a command's extension Mason Yang
2020-05-28 7:58 ` [PATCH v3 03/14] mtd: spi-nor: add support for DTR protocol Mason Yang
2020-05-28 7:58 ` [PATCH v3 04/14] mtd: spi-nor: sfdp: prepare BFPT parsing for JESD216 rev D Mason Yang
2020-05-28 7:58 ` [PATCH v3 05/14] mtd: spi-nor: sfdp: get command opcode extension type from BFPT Mason Yang
2020-05-28 7:58 ` Mason Yang [this message]
2020-05-28 7:58 ` [PATCH v3 07/14] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Mason Yang
2020-05-28 7:58 ` [PATCH v3 08/14] mtd: spi-nor: sfdp: parse command sequences to change octal DTR mode Mason Yang
2020-05-28 7:58 ` [PATCH v3 09/14] mtd: spi-nor: core: add configuration register 2 read & write support Mason Yang
2020-05-28 7:58 ` [PATCH v3 10/14] mtd: spi-nor: core: use dummy cycle and address width info from SFDP Mason Yang
2020-05-28 7:58 ` [PATCH v3 11/14] mtd: spi-nor: core: enable octal DTR mode when possible Mason Yang
2020-05-28 7:58 ` [PATCH v3 12/14] spi: mxic: patch for octal DTR mode support Mason Yang
2020-05-28 21:44 ` kbuild test robot
2020-05-28 7:58 ` [PATCH v3 13/14] mtd: spi-nor: core: execute command sequences to change octal DTR mode Mason Yang
2020-05-28 7:58 ` [PATCH v3 14/14] mtd: spi-nor: macronix: Add Octal 8D-8D-8D supports for Macronix mx25uw51245g Mason Yang
2020-05-28 8:26 ` [PATCH v3 00/14] mtd: spi-nor: add xSPI Octal DTR support Boris Brezillon
2020-05-29 5:27 ` masonccyang
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