From: Alexandre Ghiti <alex@ghiti.fr>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>, Zong Li <zong.li@sifive.com>,
Anup Patel <anup@brainfault.org>, Christoph Hellwig <hch@lst.de>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Alexandre Ghiti <alex@ghiti.fr>,
Palmer Dabbelt <palmerdabbelt@google.com>
Subject: [PATCH v2 7/8] riscv: Use pgtable_l4_enabled to output mmu type in cpuinfo
Date: Wed, 3 Jun 2020 04:11:03 -0400 [thread overview]
Message-ID: <20200603081104.14004-8-alex@ghiti.fr> (raw)
In-Reply-To: <20200603081104.14004-1-alex@ghiti.fr>
Now that the mmu type is determined at runtime using SATP
characteristic, use the global variable pgtable_l4_enabled to output
mmu type of the processor through /proc/cpuinfo instead of relying on
device tree infos.
Signed-off-by: Alexandre Ghiti <alex@ghiti.fr>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
---
arch/riscv/include/asm/pgtable.h | 1 +
arch/riscv/kernel/cpu.c | 23 ++++++++++++-----------
2 files changed, 13 insertions(+), 11 deletions(-)
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index b4b532525fee..cb8c6863266b 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -507,6 +507,7 @@ static inline void __kernel_map_pages(struct page *page, int numpages, int enabl
extern char _start[];
extern void *dtb_early_va;
extern u64 satp_mode;
+extern bool pgtable_l4_enabled;
void setup_bootmem(void);
void paging_init(void);
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index 40a3c442ac5f..4661b6669edb 100644
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -7,6 +7,7 @@
#include <linux/seq_file.h>
#include <linux/of.h>
#include <asm/smp.h>
+#include <asm/pgtable.h>
/*
* Returns the hart ID of the given device tree node, or -ENODEV if the node
@@ -54,18 +55,19 @@ static void print_isa(struct seq_file *f, const char *isa)
seq_puts(f, "\n");
}
-static void print_mmu(struct seq_file *f, const char *mmu_type)
+static void print_mmu(struct seq_file *f)
{
+ char sv_type[16];
+
#if defined(CONFIG_32BIT)
- if (strcmp(mmu_type, "riscv,sv32") != 0)
- return;
+ strncpy(sv_type, "sv32", 5);
#elif defined(CONFIG_64BIT)
- if (strcmp(mmu_type, "riscv,sv39") != 0 &&
- strcmp(mmu_type, "riscv,sv48") != 0)
- return;
+ if (pgtable_l4_enabled)
+ strncpy(sv_type, "sv48", 5);
+ else
+ strncpy(sv_type, "sv39", 5);
#endif
-
- seq_printf(f, "mmu\t\t: %s\n", mmu_type+6);
+ seq_printf(f, "mmu\t\t: %s\n", sv_type);
}
static void *c_start(struct seq_file *m, loff_t *pos)
@@ -90,14 +92,13 @@ static int c_show(struct seq_file *m, void *v)
{
unsigned long cpu_id = (unsigned long)v - 1;
struct device_node *node = of_get_cpu_node(cpu_id, NULL);
- const char *compat, *isa, *mmu;
+ const char *compat, *isa;
seq_printf(m, "processor\t: %lu\n", cpu_id);
seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id));
if (!of_property_read_string(node, "riscv,isa", &isa))
print_isa(m, isa);
- if (!of_property_read_string(node, "mmu-type", &mmu))
- print_mmu(m, mmu);
+ print_mmu(m);
if (!of_property_read_string(node, "compatible", &compat)
&& strcmp(compat, "riscv"))
seq_printf(m, "uarch\t\t: %s\n", compat);
--
2.20.1
next prev parent reply other threads:[~2020-06-03 8:18 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-03 8:10 [PATCH v2 0/8] Introduce sv48 support Alexandre Ghiti
2020-06-03 8:10 ` [PATCH v2 1/8] riscv: Get rid of compile time logic with MAX_EARLY_MAPPING_SIZE Alexandre Ghiti
2020-06-03 8:10 ` [PATCH v2 2/8] riscv: Allow to dynamically define VA_BITS Alexandre Ghiti
2020-06-03 8:10 ` [PATCH v2 3/8] riscv: Simplify MAXPHYSMEM config Alexandre Ghiti
2020-06-03 8:11 ` [PATCH v2 4/8] riscv: Prepare ptdump for vm layout dynamic addresses Alexandre Ghiti
2020-06-03 8:11 ` [PATCH v2 5/8] riscv: Implement sv48 support Alexandre Ghiti
2020-06-27 12:30 ` Nick Kossifidis
2020-06-27 14:26 ` Alex Ghiti
2020-06-03 8:11 ` [PATCH v2 6/8] riscv: Allow user to downgrade to sv39 when hw supports sv48 Alexandre Ghiti
2020-06-03 8:11 ` Alexandre Ghiti [this message]
2020-06-03 8:11 ` [PATCH v2 8/8] riscv: Explicit comment about user virtual address space size Alexandre Ghiti
2020-06-18 5:37 ` [PATCH v2 0/8] Introduce sv48 support Alex Ghiti
2020-06-18 21:54 ` Palmer Dabbelt
2020-07-01 18:27 ` Palmer Dabbelt
2020-07-03 5:22 ` Alex Ghiti
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