From: Greentime Hu <greentime.hu@sifive.com>
To: greentime.hu@sifive.com, oleg@redhat.com,
guoren@linux.alibaba.com, vincent.chen@sifive.com,
paul.walmsley@sifive.com, palmerdabbelt@google.com,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 13/13] riscv: signal: Report signal frame size to userspace via auxv
Date: Fri, 12 Jun 2020 15:10:02 +0800 [thread overview]
Message-ID: <3871f758564a156b4932a1bde19022edd556baf6.1591344965.git.greentime.hu@sifive.com> (raw)
In-Reply-To: <cover.1591344965.git.greentime.hu@sifive.com>
From: Vincent Chen <vincent.chen@sifive.com>
The vector register belongs to the signal context. They need to be stored
and restored as entering and leaving the signal handler. According to the
V-extension specification, the maximum length of the vector registers can
be 2^(XLEN-1). Hence, if userspace refers to the MINSIGSTKSZ #define
(2KB) to create a sigframe, it may not be enough. To resolve this problem,
this patch refers to the commit 94b07c1f8c39c
("arm64: signal: Report signal frame size to userspace via auxv") to enable
userspace to know the minimum required sigframe size through the auxiliary
vector and use it to allocate enough memory for signal context.
Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
---
arch/riscv/include/asm/elf.h | 17 +++++++++++++----
arch/riscv/include/asm/processor.h | 2 ++
arch/riscv/include/uapi/asm/auxvec.h | 2 ++
arch/riscv/kernel/setup.c | 5 +++++
arch/riscv/kernel/signal.c | 16 ++++++++++++++++
5 files changed, 38 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
index d83a4efd052b..b6b15fc5f784 100644
--- a/arch/riscv/include/asm/elf.h
+++ b/arch/riscv/include/asm/elf.h
@@ -57,10 +57,19 @@ extern unsigned long elf_hwcap;
#define ELF_PLATFORM (NULL)
#ifdef CONFIG_MMU
-#define ARCH_DLINFO \
-do { \
- NEW_AUX_ENT(AT_SYSINFO_EHDR, \
- (elf_addr_t)current->mm->context.vdso); \
+#define ARCH_DLINFO \
+do { \
+ NEW_AUX_ENT(AT_SYSINFO_EHDR, \
+ (elf_addr_t)current->mm->context.vdso); \
+ /* \
+ * Should always be nonzero unless there's a kernel bug. \
+ * If we haven't determined a sensible value to give to \
+ * userspace, omit the entry: \
+ */ \
+ if (likely(signal_minsigstksz)) \
+ NEW_AUX_ENT(AT_MINSIGSTKSZ, signal_minsigstksz); \
+ else \
+ NEW_AUX_ENT(AT_IGNORE, 0); \
} while (0)
#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
struct linux_binprm;
diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h
index 217273375cfb..5be2da702897 100644
--- a/arch/riscv/include/asm/processor.h
+++ b/arch/riscv/include/asm/processor.h
@@ -7,6 +7,7 @@
#define _ASM_RISCV_PROCESSOR_H
#include <linux/const.h>
+#include <linux/cache.h>
#include <asm/ptrace.h>
@@ -79,6 +80,7 @@ int riscv_of_processor_hartid(struct device_node *node);
extern void riscv_fill_hwcap(void);
+extern unsigned long signal_minsigstksz __ro_after_init;
#endif /* __ASSEMBLY__ */
#endif /* _ASM_RISCV_PROCESSOR_H */
diff --git a/arch/riscv/include/uapi/asm/auxvec.h b/arch/riscv/include/uapi/asm/auxvec.h
index d86cb17bbabe..9745a01e5e61 100644
--- a/arch/riscv/include/uapi/asm/auxvec.h
+++ b/arch/riscv/include/uapi/asm/auxvec.h
@@ -10,4 +10,6 @@
/* vDSO location */
#define AT_SYSINFO_EHDR 33
+#define AT_MINSIGSTKSZ 51
+
#endif /* _UAPI_ASM_RISCV_AUXVEC_H */
diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c
index 145128a7e560..6220e25ea9b0 100644
--- a/arch/riscv/kernel/setup.c
+++ b/arch/riscv/kernel/setup.c
@@ -17,6 +17,7 @@
#include <linux/sched/task.h>
#include <linux/swiotlb.h>
#include <linux/smp.h>
+#include <linux/processor.h>
#include <asm/clint.h>
#include <asm/cpu_ops.h>
@@ -62,6 +63,8 @@ void __init parse_dtb(void)
#endif
}
+extern void __init minsigstksz_setup(void);
+
void __init setup_arch(char **cmdline_p)
{
init_mm.start_code = (unsigned long) _stext;
@@ -95,6 +98,8 @@ void __init setup_arch(char **cmdline_p)
#endif
riscv_fill_hwcap();
+
+ minsigstksz_setup();
}
static int __init topology_init(void)
diff --git a/arch/riscv/kernel/signal.c b/arch/riscv/kernel/signal.c
index 9ada6f74bb95..4f81251867e6 100644
--- a/arch/riscv/kernel/signal.c
+++ b/arch/riscv/kernel/signal.c
@@ -404,3 +404,19 @@ asmlinkage __visible void do_notify_resume(struct pt_regs *regs,
tracehook_notify_resume(regs);
}
}
+
+unsigned long __ro_after_init signal_minsigstksz;
+
+/*
+ * Determine the stack space required for guaranteed signal devliery.
+ * This function is used to populate AT_MINSIGSTKSZ at process startup.
+ * cpufeatures setup is assumed to be complete.
+ */
+void __init minsigstksz_setup(void)
+{
+ signal_minsigstksz = sizeof(struct rt_sigframe);
+#ifdef CONFIG_VECTOR
+ if (has_vector)
+ signal_minsigstksz += riscv_vsize;
+#endif
+}
--
2.27.0
prev parent reply other threads:[~2020-06-12 7:10 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-12 7:09 [PATCH v6 00/13] riscv: Add vector ISA support Greentime Hu
2020-06-12 7:09 ` [PATCH 01/13] ptrace: Use regset_size() for dynamic regset Greentime Hu
2020-06-12 7:09 ` [PATCH 02/13] riscv: Separate patch for cflags and aflags Greentime Hu
2020-06-12 7:09 ` [PATCH 03/13] riscv: Rename __switch_to_aux -> fpu Greentime Hu
2020-06-12 7:09 ` [PATCH 04/13] riscv: Extending cpufeature.c to detect V-extension Greentime Hu
2020-06-12 7:09 ` [PATCH 05/13] riscv: Add new csr defines related to vector extension Greentime Hu
2020-06-12 7:09 ` [PATCH 06/13] riscv: Add vector feature to compile Greentime Hu
2020-06-12 7:09 ` [PATCH 07/13] riscv: Add has_vector/riscv_vsize to save vector features Greentime Hu
2020-06-12 7:09 ` [PATCH 08/13] riscv: Reset vector register Greentime Hu
2020-06-12 7:09 ` [PATCH 09/13] riscv: Add vector struct and assembler definitions Greentime Hu
2020-06-12 7:09 ` [PATCH 10/13] riscv: Add task switch support for vector Greentime Hu
2020-06-12 7:10 ` [PATCH 11/13] riscv: Add ptrace vector support Greentime Hu
2020-06-12 7:10 ` [PATCH 12/13] riscv: Add sigcontext save/restore for vector Greentime Hu
2020-06-12 7:10 ` Greentime Hu [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=3871f758564a156b4932a1bde19022edd556baf6.1591344965.git.greentime.hu@sifive.com \
--to=greentime.hu@sifive.com \
--cc=guoren@linux.alibaba.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=oleg@redhat.com \
--cc=palmerdabbelt@google.com \
--cc=paul.walmsley@sifive.com \
--cc=vincent.chen@sifive.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).