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From: Borislav Petkov <bp@alien8.de>
To: X86 ML <x86@kernel.org>
Cc: Andy Lutomirski <luto@amacapital.net>,
	Dave Hansen <dave.hansen@intel.com>,
	Nick Desaulniers <ndesaulniers@google.com>,
	Petteri Aimonen <jpa@kernelbug.mail.kapsi.fi>,
	LKML <linux-kernel@vger.kernel.org>
Subject: [PATCH v2 1/2] x86/fpu: Reset MXCSR to default in kernel_fpu_begin()
Date: Wed, 24 Jun 2020 13:46:45 +0200	[thread overview]
Message-ID: <20200624114646.28953-2-bp@alien8.de> (raw)
In-Reply-To: <20200624114646.28953-1-bp@alien8.de>

From: Petteri Aimonen <jpa@git.mail.kapsi.fi>

Previously, kernel floating point code would run with the MXCSR control
register value last set by userland code by the thread that was active
on the CPU core just before kernel call. This could affect calculation
results if rounding mode was changed, or a crash if a FPU/SIMD exception
was unmasked.

Restore MXCSR to the kernel's default value.

 [ bp: Carve out from a bigger patch by Petteri, add feature check, add
   FNINIT call too (amluto). ]

Signed-off-by: Petteri Aimonen <jpa@git.mail.kapsi.fi>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://bugzilla.kernel.org/show_bug.cgi?id=207979
---
 arch/x86/include/asm/fpu/internal.h | 5 +++++
 arch/x86/kernel/fpu/core.c          | 6 ++++++
 2 files changed, 11 insertions(+)

diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
index 42159f45bf9c..845e7481ab77 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -623,6 +623,11 @@ static inline void switch_fpu_finish(struct fpu *new_fpu)
  * MXCSR and XCR definitions:
  */
 
+static inline void ldmxcsr(u32 mxcsr)
+{
+	asm volatile("ldmxcsr %0" :: "m" (mxcsr));
+}
+
 extern unsigned int mxcsr_feature_mask;
 
 #define XCR_XFEATURE_ENABLED_MASK	0x00000000
diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c
index 06c818967bb6..15247b96c6ea 100644
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -101,6 +101,12 @@ void kernel_fpu_begin(void)
 		copy_fpregs_to_fpstate(&current->thread.fpu);
 	}
 	__cpu_invalidate_fpregs_state();
+
+	if (boot_cpu_has(X86_FEATURE_XMM))
+		ldmxcsr(MXCSR_DEFAULT);
+
+	if (boot_cpu_has(X86_FEATURE_FPU))
+		asm volatile ("fninit");
 }
 EXPORT_SYMBOL_GPL(kernel_fpu_begin);
 
-- 
2.21.0


  reply	other threads:[~2020-06-24 11:47 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-24 11:46 [PATCH v2 0/2] x86/FPU: FPU sanitization for in-kernel use Borislav Petkov
2020-06-24 11:46 ` Borislav Petkov [this message]
2020-06-29  8:34   ` [tip: x86/fpu] x86/fpu: Reset MXCSR to default in kernel_fpu_begin() tip-bot2 for Petteri Aimonen
2020-06-24 11:46 ` [PATCH v2 2/2] selftests/fpu: Add an FPU selftest Borislav Petkov
2020-06-24 17:51   ` Nick Desaulniers
2020-06-29  8:34   ` [tip: x86/fpu] " tip-bot2 for Petteri Aimonen

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