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From: Alexandre Belloni <alexandre.belloni@bootlin.com>
To: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Nicolas Ferre <nicolas.ferre@microchip.com>,
	Sebastian Andrzej Siewior <bigeasy@linutronix.de>,
	kamel.bouhara@bootlin.com, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Alexandre Belloni <alexandre.belloni@bootlin.com>
Subject: [PATCH v5 3/9] ARM: dts: at91: sama5d2: add TCB GCLK
Date: Thu, 25 Jun 2020 23:43:06 +0200	[thread overview]
Message-ID: <20200625214312.1382063-4-alexandre.belloni@bootlin.com> (raw)
In-Reply-To: <20200625214312.1382063-1-alexandre.belloni@bootlin.com>

The sama5d2 tcbs take an extra input clock, their gclk.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
---
 arch/arm/boot/dts/sama5d2.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 31d8766ec7ef..d7f25706892d 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -375,23 +375,23 @@ macb0: ethernet@f8008000 {
 			};
 
 			tcb0: timer@f800c000 {
-				compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
+				compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
 				#address-cells = <1>;
 				#size-cells = <0>;
 				reg = <0xf800c000 0x100>;
 				interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
-				clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&clk32k>;
-				clock-names = "t0_clk", "slow_clk";
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&pmc PMC_TYPE_GCK 35>, <&clk32k>;
+				clock-names = "t0_clk", "gclk", "slow_clk";
 			};
 
 			tcb1: timer@f8010000 {
-				compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
+				compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
 				#address-cells = <1>;
 				#size-cells = <0>;
 				reg = <0xf8010000 0x100>;
 				interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
-				clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&clk32k>;
-				clock-names = "t0_clk", "slow_clk";
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&pmc PMC_TYPE_GCK 36>, <&clk32k>;
+				clock-names = "t0_clk", "gclk", "slow_clk";
 			};
 
 			hsmc: hsmc@f8014000 {
-- 
2.26.2


  parent reply	other threads:[~2020-06-25 21:43 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-25 21:43 [PATCH v5 0/9] clocksource/drivers/timer-atmel-tcb: add sama5d2 support Alexandre Belloni
2020-06-25 21:43 ` [PATCH v5 1/9] dt-bindings: atmel-tcb: convert bindings to json-schema Alexandre Belloni
2020-06-25 21:43 ` [PATCH v5 2/9] dt-bindings: microchip: atmel,at91rm9200-tcb: add sama5d2 compatible Alexandre Belloni
2020-06-25 21:43 ` Alexandre Belloni [this message]
2020-06-25 21:43 ` [PATCH v5 4/9] ARM: at91: add atmel tcb capabilities Alexandre Belloni
2020-06-25 21:43 ` [PATCH v5 5/9] clocksource/drivers/timer-atmel-tcb: rework 32khz clock selection Alexandre Belloni
2020-06-25 21:43 ` [PATCH v5 6/9] clocksource/drivers/timer-atmel-tcb: fill tcb_config Alexandre Belloni
2020-06-25 21:43 ` [PATCH v5 7/9] clocksource/drivers/timer-atmel-tcb: stop using the 32kHz for clockevents Alexandre Belloni
2020-06-25 21:43 ` [PATCH v5 8/9] clocksource/drivers/timer-atmel-tcb: allow selecting first divider Alexandre Belloni
2020-06-25 21:43 ` [PATCH v5 9/9] clocksource/drivers/timer-atmel-tcb: add sama5d2 support Alexandre Belloni

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