From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: linux-kernel@vger.kernel.org
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>,
Michal Simek <michal.simek@xilinx.com>,
Vinod Koul <vkoul@kernel.org>
Subject: [PATCH v9 3/3] arm64: dts: zynqmp: Add GTR transceivers
Date: Mon, 29 Jun 2020 15:00:54 +0300 [thread overview]
Message-ID: <20200629120054.29338-4-laurent.pinchart@ideasonboard.com> (raw)
In-Reply-To: <20200629120054.29338-1-laurent.pinchart@ideasonboard.com>
Add a DT node for the PS-GTR transceivers.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 9174ddc76bdc..a0aad47b0ffc 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -13,6 +13,7 @@
*/
#include <dt-bindings/power/xlnx-zynqmp-power.h>
+#include <dt-bindings/reset/xlnx-zynqmp-resets.h>
/ {
compatible = "xlnx,zynqmp";
@@ -558,6 +559,15 @@ pcie_intc: legacy-interrupt-controller {
};
};
+ psgtr: phy@fd400000 {
+ compatible = "xlnx,zynqmp-psgtr-v1.1";
+ status = "disabled";
+ reg = <0x0 0xfd400000 0x0 0x40000>,
+ <0x0 0xfd3d0000 0x0 0x1000>;
+ reg-names = "serdes", "siou";
+ #phy-cells = <4>;
+ };
+
rtc: rtc@ffa60000 {
compatible = "xlnx,zynqmp-rtc";
status = "disabled";
--
Regards,
Laurent Pinchart
next prev parent reply other threads:[~2020-06-29 20:47 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-29 12:00 [PATCH v9 0/3] phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver Laurent Pinchart
2020-06-29 12:00 ` [PATCH v9 1/3] dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY Laurent Pinchart
2020-06-29 22:30 ` Rob Herring
2020-07-01 13:33 ` Laurent Pinchart
2020-07-01 23:04 ` Rob Herring
2020-06-29 12:00 ` [PATCH v9 2/3] phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver Laurent Pinchart
2020-06-29 12:00 ` Laurent Pinchart [this message]
2020-06-29 13:19 ` [PATCH v9 0/3] " Vinod Koul
2020-06-29 13:49 ` Laurent Pinchart
2020-07-08 8:32 ` Michal Simek
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