From: Cathy Zhang <cathy.zhang@intel.com>
To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org
Cc: pbonzini@redhat.com, sean.j.christopherson@intel.com,
vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com,
joro@8bytes.org, tglx@linutronix.de, mingo@redhat.com,
bp@alien8.de, hpa@zytor.com,
ricardo.neri-calderon@linux.intel.com, kyung.min.park@intel.com,
Cathy Zhang <cathy.zhang@intel.com>
Subject: [PATCH 2/2] x86: Expose TSX Suspend Load Address Tracking
Date: Mon, 6 Jul 2020 06:59:52 +0800 [thread overview]
Message-ID: <1593989992-10019-3-git-send-email-cathy.zhang@intel.com> (raw)
In-Reply-To: <1593989992-10019-1-git-send-email-cathy.zhang@intel.com>
TSX Suspend Load Address Tracking is supported by intel processors,
like Sapphire Rapids. Expose it in KVM supported cpuid.
The associated kernel enumeration patches link is as follows:
https://lore.kernel.org/patchwork/patch/1254756/
Signed-off-by: Cathy Zhang <cathy.zhang@intel.com>
---
arch/x86/kvm/cpuid.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index e603aeb..dcf48cc 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -342,7 +342,7 @@ void kvm_set_cpu_caps(void)
F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) |
- F(SERIALIZE)
+ F(SERIALIZE) | F(TSX_LDTRK)
);
/* TSC_ADJUST and ARCH_CAPABILITIES are emulated in software. */
--
1.8.3.1
next prev parent reply other threads:[~2020-07-05 23:05 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-05 22:59 [PATCH 0/2] Expose new features for intel processor Cathy Zhang
2020-07-05 22:59 ` [PATCH 1/2] x86: Expose SERIALIZE for supported cpuid Cathy Zhang
2020-07-06 18:06 ` kernel test robot
2020-07-05 22:59 ` Cathy Zhang [this message]
2020-07-06 21:19 ` [PATCH 2/2] x86: Expose TSX Suspend Load Address Tracking kernel test robot
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