From: Maxime Ripard <maxime@cerno.tech>
To: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
Eric Anholt <eric@anholt.net>
Cc: dri-devel@lists.freedesktop.org,
linux-rpi-kernel@lists.infradead.org,
bcm-kernel-feedback-list@broadcom.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Dave Stevenson <dave.stevenson@raspberrypi.com>,
Tim Gover <tim.gover@raspberrypi.com>,
Phil Elwell <phil@raspberrypi.com>,
Maxime Ripard <maxime@cerno.tech>
Subject: [PATCH v4 37/78] drm/vc4: crtc: Add BCM2711 pixelvalves
Date: Wed, 8 Jul 2020 19:41:45 +0200 [thread overview]
Message-ID: <f45d5249575d28a5ace6fd7cef1f856fa8d703ac.1594230107.git-series.maxime@cerno.tech> (raw)
In-Reply-To: <cover.7a1aa1784976093af26cb31fd283cf5b3ed568bb.1594230107.git-series.maxime@cerno.tech>
The BCM2711 has 5 pixelvalves, so now that our driver is ready, let's add
support for them.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
drivers/gpu/drm/vc4/vc4_crtc.c | 95 ++++++++++++++++++++++++++++++++++-
drivers/gpu/drm/vc4/vc4_regs.h | 7 +++-
2 files changed, 100 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index a8bc3b26a0fb..c19687eabaf6 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -208,6 +208,7 @@ void vc4_crtc_destroy(struct drm_crtc *crtc)
static u32 vc4_get_fifo_full_level(struct vc4_crtc *vc4_crtc, u32 format)
{
+ const struct vc4_crtc_data *crtc_data = vc4_crtc_to_vc4_crtc_data(vc4_crtc);
const struct vc4_pv_data *pv_data = vc4_crtc_to_vc4_pv_data(vc4_crtc);
u32 fifo_len_bytes = pv_data->fifo_depth;
@@ -230,6 +231,13 @@ static u32 vc4_get_fifo_full_level(struct vc4_crtc *vc4_crtc, u32 format)
case PV_CONTROL_FORMAT_24:
case PV_CONTROL_FORMAT_DSIV_24:
default:
+ /*
+ * For some reason, the pixelvalve4 doesn't work with
+ * the usual formula and will only work with 32.
+ */
+ if (crtc_data->hvs_output == 5)
+ return 32;
+
return fifo_len_bytes - 3 * HVS_FIFO_LATENCY_PIX;
}
}
@@ -238,9 +246,13 @@ static u32 vc4_crtc_get_fifo_full_level_bits(struct vc4_crtc *vc4_crtc,
u32 format)
{
u32 level = vc4_get_fifo_full_level(vc4_crtc, format);
+ u32 ret = 0;
+
+ ret |= VC4_SET_FIELD((level >> 6),
+ PV5_CONTROL_FIFO_LEVEL_HIGH);
- return VC4_SET_FIELD(level & 0x3f,
- PV_CONTROL_FIFO_LEVEL);
+ return ret | VC4_SET_FIELD(level & 0x3f,
+ PV_CONTROL_FIFO_LEVEL);
}
/*
@@ -278,6 +290,8 @@ static void vc4_crtc_pixelvalve_reset(struct drm_crtc *crtc)
static void vc4_crtc_config_pv(struct drm_crtc *crtc)
{
+ struct drm_device *dev = crtc->dev;
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc);
struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
@@ -358,6 +372,11 @@ static void vc4_crtc_config_pv(struct drm_crtc *crtc)
if (is_dsi)
CRTC_WRITE(PV_HACT_ACT, mode->hdisplay * pixel_rep);
+ if (vc4->hvs->hvs5)
+ CRTC_WRITE(PV_MUX_CFG,
+ VC4_SET_FIELD(PV_MUX_CFG_RGB_PIXEL_MUX_MODE_NO_SWAP,
+ PV_MUX_CFG_RGB_PIXEL_MUX_MODE));
+
CRTC_WRITE(PV_CONTROL, PV_CONTROL_FIFO_CLR |
vc4_crtc_get_fifo_full_level_bits(vc4_crtc, format) |
VC4_SET_FIELD(format, PV_CONTROL_FORMAT) |
@@ -891,10 +910,82 @@ static const struct vc4_pv_data bcm2835_pv2_data = {
},
};
+static const struct vc4_pv_data bcm2711_pv0_data = {
+ .base = {
+ .hvs_available_channels = BIT(0),
+ .hvs_output = 0,
+ },
+ .debugfs_name = "crtc0_regs",
+ .fifo_depth = 64,
+ .pixels_per_clock = 1,
+ .encoder_types = {
+ [0] = VC4_ENCODER_TYPE_DSI0,
+ [1] = VC4_ENCODER_TYPE_DPI,
+ },
+};
+
+static const struct vc4_pv_data bcm2711_pv1_data = {
+ .base = {
+ .hvs_available_channels = BIT(0) | BIT(1) | BIT(2),
+ .hvs_output = 3,
+ },
+ .debugfs_name = "crtc1_regs",
+ .fifo_depth = 64,
+ .pixels_per_clock = 1,
+ .encoder_types = {
+ [0] = VC4_ENCODER_TYPE_DSI1,
+ [1] = VC4_ENCODER_TYPE_SMI,
+ },
+};
+
+static const struct vc4_pv_data bcm2711_pv2_data = {
+ .base = {
+ .hvs_available_channels = BIT(0) | BIT(1) | BIT(2),
+ .hvs_output = 4,
+ },
+ .debugfs_name = "crtc2_regs",
+ .fifo_depth = 256,
+ .pixels_per_clock = 2,
+ .encoder_types = {
+ [0] = VC4_ENCODER_TYPE_HDMI0,
+ },
+};
+
+static const struct vc4_pv_data bcm2711_pv3_data = {
+ .base = {
+ .hvs_available_channels = BIT(1),
+ .hvs_output = 1,
+ },
+ .debugfs_name = "crtc3_regs",
+ .fifo_depth = 64,
+ .pixels_per_clock = 1,
+ .encoder_types = {
+ [0] = VC4_ENCODER_TYPE_VEC,
+ },
+};
+
+static const struct vc4_pv_data bcm2711_pv4_data = {
+ .base = {
+ .hvs_available_channels = BIT(0) | BIT(1) | BIT(2),
+ .hvs_output = 5,
+ },
+ .debugfs_name = "crtc4_regs",
+ .fifo_depth = 64,
+ .pixels_per_clock = 2,
+ .encoder_types = {
+ [0] = VC4_ENCODER_TYPE_HDMI1,
+ },
+};
+
static const struct of_device_id vc4_crtc_dt_match[] = {
{ .compatible = "brcm,bcm2835-pixelvalve0", .data = &bcm2835_pv0_data },
{ .compatible = "brcm,bcm2835-pixelvalve1", .data = &bcm2835_pv1_data },
{ .compatible = "brcm,bcm2835-pixelvalve2", .data = &bcm2835_pv2_data },
+ { .compatible = "brcm,bcm2711-pixelvalve0", .data = &bcm2711_pv0_data },
+ { .compatible = "brcm,bcm2711-pixelvalve1", .data = &bcm2711_pv1_data },
+ { .compatible = "brcm,bcm2711-pixelvalve2", .data = &bcm2711_pv2_data },
+ { .compatible = "brcm,bcm2711-pixelvalve3", .data = &bcm2711_pv3_data },
+ { .compatible = "brcm,bcm2711-pixelvalve4", .data = &bcm2711_pv4_data },
{}
};
diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
index 7fbac68b6fe1..c0031ab19689 100644
--- a/drivers/gpu/drm/vc4/vc4_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
@@ -129,6 +129,8 @@
#define V3D_ERRSTAT 0x00f20
#define PV_CONTROL 0x00
+# define PV5_CONTROL_FIFO_LEVEL_HIGH_MASK VC4_MASK(26, 25)
+# define PV5_CONTROL_FIFO_LEVEL_HIGH_SHIFT 25
# define PV_CONTROL_FORMAT_MASK VC4_MASK(23, 21)
# define PV_CONTROL_FORMAT_SHIFT 21
# define PV_CONTROL_FORMAT_24 0
@@ -208,6 +210,11 @@
#define PV_HACT_ACT 0x30
+#define PV_MUX_CFG 0x34
+# define PV_MUX_CFG_RGB_PIXEL_MUX_MODE_MASK VC4_MASK(5, 2)
+# define PV_MUX_CFG_RGB_PIXEL_MUX_MODE_SHIFT 2
+# define PV_MUX_CFG_RGB_PIXEL_MUX_MODE_NO_SWAP 8
+
#define SCALER_CHANNELS_COUNT 3
#define SCALER_DISPCTRL 0x00000000
--
git-series 0.9.1
next prev parent reply other threads:[~2020-07-08 17:45 UTC|newest]
Thread overview: 144+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20200709070649epcas1p13664bacc66a0f73443bf4d3e8940f933@epcas1p1.samsung.com>
2020-07-08 17:41 ` [PATCH v4 00/78] drm/vc4: Support BCM2711 Display Pipeline Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 01/78] dt-bindings: display: Add support for the BCM2711 HVS Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 02/78] drm/vc4: Add support for the BCM2711 HVS5 Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 03/78] drm/vc4: hvs: Boost the core clock during modeset Maxime Ripard
2020-09-01 11:21 ` Chanwoo Choi
2020-09-01 11:48 ` Chanwoo Choi
2020-09-02 14:48 ` Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 04/78] drm/vc4: plane: Change LBM alignment constraint on LBM Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 05/78] drm/vc4: plane: Optimize the LBM allocation size Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 06/78] drm/vc4: plane: Create more planes Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 07/78] drm/vc4: crtc: Deal with different number of pixel per clock Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 08/78] drm/vc4: crtc: Use a shared interrupt Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 09/78] drm/vc4: crtc: Move the cob allocation outside of bind Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 10/78] drm/vc4: crtc: Rename HVS channel to output Maxime Ripard
2020-07-28 9:48 ` Dave Stevenson
2020-07-08 17:41 ` [PATCH v4 11/78] drm/vc4: crtc: Use local chan variable Maxime Ripard
2020-07-28 9:50 ` Dave Stevenson
2020-07-08 17:41 ` [PATCH v4 12/78] drm/vc4: crtc: Enable and disable the PV in atomic_enable / disable Maxime Ripard
2020-07-28 9:57 ` Dave Stevenson
2020-07-08 17:41 ` [PATCH v4 13/78] drm/vc4: kms: Convert to for_each_new_crtc_state Maxime Ripard
2020-07-29 15:02 ` Dave Stevenson
2020-09-02 17:59 ` Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 14/78] drm/vc4: crtc: Assign output to channel automatically Maxime Ripard
2020-07-29 14:31 ` Dave Stevenson
2020-07-08 17:41 ` [PATCH v4 15/78] drm/vc4: crtc: Add FIFO depth to vc4_crtc_data Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 16/78] drm/vc4: crtc: Add function to compute FIFO level bits Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 17/78] drm/vc4: crtc: Rename HDMI encoder type to HDMI0 Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 18/78] drm/vc4: crtc: Add HDMI1 encoder type Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 19/78] drm/vc4: crtc: Disable color management for HVS5 Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 20/78] drm/vc4: crtc: Turn pixelvalve reset into a function Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 21/78] drm/vc4: crtc: Move PV dump to config_pv Maxime Ripard
2020-07-28 10:30 ` Dave Stevenson
2020-07-08 17:41 ` [PATCH v4 22/78] drm/vc4: crtc: Move HVS init and close to a function Maxime Ripard
2020-07-28 10:31 ` Dave Stevenson
2020-07-08 17:41 ` [PATCH v4 23/78] drm/vc4: crtc: Move the HVS gamma LUT setup to our init function Maxime Ripard
2020-07-29 14:42 ` Dave Stevenson
2020-07-08 17:41 ` [PATCH v4 24/78] drm/vc4: hvs: Make sure our channel is reset Maxime Ripard
2020-07-28 10:37 ` Dave Stevenson
2020-07-08 17:41 ` [PATCH v4 25/78] drm/vc4: crtc: Remove mode_set_nofb Maxime Ripard
2020-07-28 10:38 ` Dave Stevenson
2020-07-08 17:41 ` [PATCH v4 26/78] drm/vc4: crtc: Remove redundant pixelvalve reset Maxime Ripard
2020-07-28 10:39 ` Dave Stevenson
2020-07-08 17:41 ` [PATCH v4 27/78] drm/vc4: crtc: Move HVS channel init before the PV initialisation Maxime Ripard
2020-07-28 10:40 ` Dave Stevenson
2020-07-08 17:41 ` [PATCH v4 28/78] drm/vc4: encoder: Add finer-grained encoder callbacks Maxime Ripard
2020-07-28 11:25 ` Dave Stevenson
2020-07-08 17:41 ` [PATCH v4 29/78] drm/vc4: crtc: Add a delay after disabling the PixelValve output Maxime Ripard
2020-07-29 14:09 ` Dave Stevenson
2020-07-29 14:42 ` Maxime Ripard
2020-07-29 14:45 ` Dave Stevenson
2020-07-29 15:50 ` Stefan Wahren
2020-08-25 15:06 ` Maxime Ripard
2020-08-25 21:30 ` Stefan Wahren
2020-09-01 9:58 ` Maxime Ripard
2020-09-01 16:31 ` Stefan Wahren
2020-09-02 15:08 ` Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 30/78] drm/vc4: crtc: Clear the PixelValve FIFO on disable Maxime Ripard
2020-07-28 11:40 ` Dave Stevenson
2020-07-08 17:41 ` [PATCH v4 31/78] drm/vc4: crtc: Clear the PixelValve FIFO during configuration Maxime Ripard
2020-07-28 11:41 ` Dave Stevenson
2020-07-08 17:41 ` [PATCH v4 32/78] drm/vc4: hvs: Make the stop_channel function public Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 33/78] drm/vc4: hvs: Introduce a function to get the assigned FIFO Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 34/78] drm/vc4: crtc: Move the CRTC disable out Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 35/78] drm/vc4: drv: Disable the CRTC at boot time Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 36/78] dt-bindings: display: vc4: pv: Add BCM2711 pixel valves Maxime Ripard
2020-07-08 17:41 ` Maxime Ripard [this message]
2020-07-08 17:41 ` [PATCH v4 38/78] drm/vc4: hdmi: Use debugfs private field Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 39/78] drm/vc4: hdmi: Move structure to header Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 40/78] drm/vc4: hdmi: rework connectors and encoders Maxime Ripard
2020-07-28 11:58 ` Dave Stevenson
2020-07-08 17:41 ` [PATCH v4 41/78] drm/vc4: hdmi: Remove DDC argument to connector_init Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 42/78] drm/vc4: hdmi: Rename hdmi to vc4_hdmi Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 43/78] drm/vc4: hdmi: Move accessors " Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 44/78] drm/vc4: hdmi: Use local vc4_hdmi directly Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 45/78] drm/vc4: hdmi: Add container_of macros for encoders and connectors Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 46/78] drm/vc4: hdmi: Pass vc4_hdmi to CEC code Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 47/78] drm/vc4: hdmi: Retrieve the vc4_hdmi at unbind using our device Maxime Ripard
2020-07-28 12:32 ` Dave Stevenson
2020-07-08 17:41 ` [PATCH v4 48/78] drm/vc4: hdmi: Remove vc4_dev hdmi pointer Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 49/78] drm/vc4: hdmi: Remove vc4_hdmi_connector Maxime Ripard
2020-07-08 17:41 ` [PATCH v4 50/78] drm/vc4: hdmi: Introduce resource init and variant Maxime Ripard
2020-07-28 12:37 ` Dave Stevenson
2020-07-08 17:41 ` [PATCH v4 51/78] drm/vc4: hdmi: Implement a register layout abstraction Maxime Ripard
2020-07-28 12:59 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 52/78] drm/vc4: hdmi: Add reset callback Maxime Ripard
2020-07-28 13:00 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 53/78] drm/vc4: hdmi: Add PHY init and disable function Maxime Ripard
2020-07-28 13:03 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 54/78] drm/vc4: hdmi: Add PHY RNG enable / " Maxime Ripard
2020-07-28 13:04 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 55/78] drm/vc4: hdmi: Add a CSC setup callback Maxime Ripard
2020-07-28 13:12 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 56/78] drm/vc4: hdmi: Store the encoder type in the variant structure Maxime Ripard
2020-07-28 13:18 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 57/78] drm/vc4: hdmi: Deal with multiple debugfs files Maxime Ripard
2020-07-28 13:20 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 58/78] drm/vc4: hdmi: Move CEC init to its own function Maxime Ripard
2020-07-28 13:23 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 59/78] drm/vc4: hdmi: Add CEC support flag Maxime Ripard
2020-07-28 13:25 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 60/78] drm/vc4: hdmi: Remove unused CEC_CLOCK_DIV define Maxime Ripard
2020-07-28 13:26 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 61/78] drm/vc4: hdmi: Rename drm_encoder pointer in mode_valid Maxime Ripard
2020-07-28 14:45 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 62/78] drm/vc4: hdmi: Adjust HSM clock rate depending on pixel rate Maxime Ripard
2020-07-28 14:56 ` Dave Stevenson
2020-09-01 4:36 ` Chanwoo Choi
2020-09-01 9:45 ` Maxime Ripard
2020-09-01 10:48 ` Chanwoo Choi
2020-07-08 17:42 ` [PATCH v4 63/78] drm/vc4: hdmi: Use clk_set_min_rate instead Maxime Ripard
2020-07-28 14:57 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 64/78] drm/vc4: hdmi: Use reg-names to retrieve the HDMI audio registers Maxime Ripard
2020-07-08 17:42 ` [PATCH v4 65/78] drm/vc4: hdmi: Reset audio infoframe on encoder_enable if previously streaming Maxime Ripard
2020-07-08 17:42 ` [PATCH v4 66/78] drm/vc4: hdmi: Set the b-frame marker to the match ALSA's default Maxime Ripard
2020-07-08 17:42 ` [PATCH v4 67/78] drm/vc4: hdmi: Add audio-related callbacks Maxime Ripard
2020-07-08 17:42 ` [PATCH v4 68/78] drm/vc4: hdmi: Deal with multiple ALSA cards Maxime Ripard
2020-07-28 15:00 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 69/78] drm/vc4: hdmi: Remove register dumps in enable Maxime Ripard
2020-07-28 15:01 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 70/78] drm/vc4: hdmi: Always recenter the HDMI FIFO Maxime Ripard
2020-07-28 15:03 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 71/78] drm/vc4: hdmi: Implement finer-grained hooks Maxime Ripard
2020-07-28 15:04 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 72/78] drm/vc4: hdmi: Do the VID_CTL configuration at once Maxime Ripard
2020-07-28 15:06 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 73/78] drm/vc4: hdmi: Switch to blank pixels when disabled Maxime Ripard
2020-07-28 15:09 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 74/78] drm/vc4: hdmi: Support the BCM2711 HDMI controllers Maxime Ripard
2020-07-28 15:21 ` Dave Stevenson
2020-07-08 17:42 ` [PATCH v4 75/78] dt-bindings: display: vc4: hdmi: Add BCM2711 HDMI controllers bindings Maxime Ripard
2020-09-01 4:45 ` Chanwoo Choi
2020-09-01 9:52 ` Maxime Ripard
2020-07-08 17:42 ` [PATCH v4 76/78] dt-bindings: display: vc4: Document BCM2711 VC5 Maxime Ripard
2020-07-08 17:42 ` [PATCH v4 77/78] drm/vc4: drv: Support BCM2711 Maxime Ripard
2020-07-28 15:30 ` Dave Stevenson
2020-09-01 10:19 ` Maxime Ripard
2020-07-08 17:42 ` [PATCH v4 78/78] ARM: dts: bcm2711: Enable the display pipeline Maxime Ripard
2020-07-28 15:35 ` Dave Stevenson
2020-07-10 7:37 ` [PATCH v4 00/78] drm/vc4: Support BCM2711 Display Pipeline Jian-Hong Pan
2020-07-10 9:58 ` Stefan Wahren
2020-08-21 7:18 ` Hoegeun Kwon
2020-09-02 13:32 ` Maxime Ripard
2020-09-02 13:52 ` Maxime Ripard
2020-08-31 2:36 ` Chanwoo Choi
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