From: Saheed Olayemi Bolarinwa <refactormyself@gmail.com>
To: helgaas@kernel.org
Cc: Bolarinwa Olayemi Saheed <refactormyself@gmail.com>,
bjorn@helgaas.com, Lukas Wunner <lukas@wunner.de>,
skhan@linuxfoundation.org, linux-pci@vger.kernel.org,
linux-kernel-mentees@lists.linuxfoundation.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 5/14 v3] PCI: pciehp: Check the return value of pcie_capability_read_*()
Date: Fri, 10 Jul 2020 23:20:17 +0200 [thread overview]
Message-ID: <20200710212026.27136-6-refactormyself@gmail.com> (raw)
In-Reply-To: <20200710212026.27136-1-refactormyself@gmail.com>
From: Bolarinwa Olayemi Saheed <refactormyself@gmail.com>
On any failure pcie_capability_read_word() sets it's last parameter,
*val to 0, this value may have be earlier set by pci_config_read_word()
to ~0. So, any function which check only for a frabricated ~0 will fail
in this case.
Checking for the return value of pcie_capability_read_dword() will help
assert failure or success of this function. But more checks may be needed
to assure the validity of the value.
Include a check on the return value of pcie_capability_read_word() to
confirm success or failure.
Suggested-by: Bjorn Helgaas <bjorn@helgaas.com>
Signed-off-by: Bolarinwa Olayemi Saheed <refactormyself@gmail.com>
---
drivers/pci/hotplug/pciehp_hpc.c | 16 +++++++++-------
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 53433b37e181..5af281d97d4f 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -86,10 +86,11 @@ static int pcie_poll_cmd(struct controller *ctrl, int timeout)
{
struct pci_dev *pdev = ctrl_dev(ctrl);
u16 slot_status;
+ int ret;
do {
- pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
- if (slot_status == (u16) ~0) {
+ ret = pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
+ if (ret || (slot_status == (u16) ~0)) {
ctrl_info(ctrl, "%s: no response from device\n",
__func__);
return 0;
@@ -156,6 +157,7 @@ static void pcie_do_write_cmd(struct controller *ctrl, u16 cmd,
{
struct pci_dev *pdev = ctrl_dev(ctrl);
u16 slot_ctrl_orig, slot_ctrl;
+ int ret;
mutex_lock(&ctrl->ctrl_lock);
@@ -164,8 +166,8 @@ static void pcie_do_write_cmd(struct controller *ctrl, u16 cmd,
*/
pcie_wait_cmd(ctrl);
- pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl);
- if (slot_ctrl == (u16) ~0) {
+ ret = pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl);
+ if (ret || (slot_ctrl == (u16) ~0)) {
ctrl_info(ctrl, "%s: no response from device\n", __func__);
goto out;
}
@@ -430,7 +432,7 @@ void pciehp_get_latch_status(struct controller *ctrl, u8 *status)
* removed immediately after the check so the caller may need to take
* this into account.
*
- * It the hotplug controller itself is not available anymore returns
+ * If the hotplug controller itself is not available anymore returns
* %-ENODEV.
*/
int pciehp_card_present(struct controller *ctrl)
@@ -591,8 +593,8 @@ static irqreturn_t pciehp_isr(int irq, void *dev_id)
}
read_status:
- pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &status);
- if (status == (u16) ~0) {
+ ret = pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &status);
+ if (ret || (status == (u16) ~0)) {
ctrl_info(ctrl, "%s: no response from device\n", __func__);
if (parent)
pm_runtime_put(parent);
--
2.18.2
next prev parent reply other threads:[~2020-07-10 22:20 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-10 21:20 [PATCH 0/14 v3] PCI: Remove '*val = 0' from pcie_capability_read_*() Saheed Olayemi Bolarinwa
2020-07-10 21:20 ` [PATCH 2/14 v3] misc: rtsx: Check the return value of pcie_capability_read_*() Saheed Olayemi Bolarinwa
2020-07-10 21:20 ` Saheed Olayemi Bolarinwa [this message]
2020-07-10 21:20 ` [PATCH 6/14 v3] PCI: pciehp: Make "Power On" the default Saheed Olayemi Bolarinwa
2020-07-10 21:20 ` [PATCH 7/14 v3] PCI: pciehp: Check the return value of pcie_capability_read_*() Saheed Olayemi Bolarinwa
2020-07-10 21:20 ` [PATCH 9/14 v3] PCI: pciehp: Check " Saheed Olayemi Bolarinwa
2020-07-10 21:20 ` [PATCH 10/14 v3] PCI: " Saheed Olayemi Bolarinwa
2020-07-10 21:20 ` [PATCH 11/14 v3] PCI/PM: " Saheed Olayemi Bolarinwa
2020-07-14 8:10 ` David Laight
2020-07-10 21:20 ` [PATCH 13/14] PCI/ASPM: Check the " Saheed Olayemi Bolarinwa
2020-07-10 21:20 ` [PATCH 14/14 v3] PCI: Remove '*val = 0' from pcie_capability_read_*() Saheed Olayemi Bolarinwa
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