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From: Saheed Olayemi Bolarinwa <refactormyself@gmail.com>
To: helgaas@kernel.org
Cc: Bolarinwa Olayemi Saheed <refactormyself@gmail.com>,
	bjorn@helgaas.com, skhan@linuxfoundation.org,
	linux-pci@vger.kernel.org,
	linux-kernel-mentees@lists.linuxfoundation.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH 7/14 v3] PCI: pciehp: Check the return value of pcie_capability_read_*()
Date: Fri, 10 Jul 2020 23:20:19 +0200	[thread overview]
Message-ID: <20200710212026.27136-8-refactormyself@gmail.com> (raw)
In-Reply-To: <20200710212026.27136-1-refactormyself@gmail.com>

From: Bolarinwa Olayemi Saheed <refactormyself@gmail.com>

If pcie_capability_read_word() fail, slot_ctrl will be 0 and the switch
expression evaluates to 0. So *status = 1 "ON". However, with Patch 14/14
it is possible that slot_ctrl is set to ~0 on failure. This would 
introduce a bug because (x & x) == (~0 & x), so the switch expression
evaluates to PCI_EXP_SLTCTL_PCC. This means that on failure *status = 1
"OFF", since PCI_EXP_SLTCTL_PCC = PCI_EXP_SLTCTL_PWR_OFF.

Use an if-statement and include a check on the return value of
pcie_capability_read_word() to confirm success or failure.

Suggested-by: Bjorn Helgaas <bjorn@helgaas.com>
Signed-off-by: Bolarinwa Olayemi Saheed <refactormyself@gmail.com>

---
 drivers/pci/hotplug/pciehp_hpc.c | 14 +++++---------
 1 file changed, 5 insertions(+), 9 deletions(-)

diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index b89c9ee4a3b5..f5ef3fbace69 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -394,20 +394,16 @@ void pciehp_get_power_status(struct controller *ctrl, u8 *status)
 {
 	struct pci_dev *pdev = ctrl_dev(ctrl);
 	u16 slot_ctrl;
+	int ret;
 
-	pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl);
+	*status = 1;	/* On */
+	ret = pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl);
 	ctrl_dbg(ctrl, "%s: SLOTCTRL %x value read %x\n", __func__,
 		 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl);
 
-	switch (slot_ctrl & PCI_EXP_SLTCTL_PCC) {
-	case PCI_EXP_SLTCTL_PWR_OFF:
+	if (!ret &&
+		((slot_ctrl & PCI_EXP_SLTCTL_PCC) == PCI_EXP_SLTCTL_PWR_OFF))
 		*status = 0;	/* Off */
-		break;
-	case PCI_EXP_SLTCTL_PWR_ON:
-	default:
-		*status = 1;	/* On */
-		break;
-	}
 }
 
 void pciehp_get_latch_status(struct controller *ctrl, u8 *status)
-- 
2.18.2


  parent reply	other threads:[~2020-07-10 22:20 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-10 21:20 [PATCH 0/14 v3] PCI: Remove '*val = 0' from pcie_capability_read_*() Saheed Olayemi Bolarinwa
2020-07-10 21:20 ` [PATCH 2/14 v3] misc: rtsx: Check the return value of pcie_capability_read_*() Saheed Olayemi Bolarinwa
2020-07-10 21:20 ` [PATCH 5/14 v3] PCI: pciehp: " Saheed Olayemi Bolarinwa
2020-07-10 21:20 ` [PATCH 6/14 v3] PCI: pciehp: Make "Power On" the default Saheed Olayemi Bolarinwa
2020-07-10 21:20 ` Saheed Olayemi Bolarinwa [this message]
2020-07-10 21:20 ` [PATCH 9/14 v3] PCI: pciehp: Check return value of pcie_capability_read_*() Saheed Olayemi Bolarinwa
2020-07-10 21:20 ` [PATCH 10/14 v3] PCI: " Saheed Olayemi Bolarinwa
2020-07-10 21:20 ` [PATCH 11/14 v3] PCI/PM: " Saheed Olayemi Bolarinwa
2020-07-14  8:10   ` David Laight
2020-07-10 21:20 ` [PATCH 13/14] PCI/ASPM: Check the " Saheed Olayemi Bolarinwa
2020-07-10 21:20 ` [PATCH 14/14 v3] PCI: Remove '*val = 0' from pcie_capability_read_*() Saheed Olayemi Bolarinwa

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