From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: tglx@linutronix.de
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>,
Nicolas Ferre <nicolas.ferre@microchip.com>,
Ludovic Desroches <ludovic.desroches@microchip.com>,
linux-kernel@vger.kernel.org (open list:CLOCKSOURCE,
CLOCKEVENT DRIVERS),
linux-arm-kernel@lists.infradead.org (moderated
list:ARM/Microchip (AT91) SoC support)
Subject: [PATCH 07/16] clocksource/drivers/timer-atmel-tcb: Stop using the 32kHz for clockevents
Date: Thu, 23 Jul 2020 17:26:27 +0200 [thread overview]
Message-ID: <20200723152639.639771-7-daniel.lezcano@linaro.org> (raw)
In-Reply-To: <20200723152639.639771-1-daniel.lezcano@linaro.org>
From: Alexandre Belloni <alexandre.belloni@bootlin.com>
Stop using the slow clock as the clock source for 32 bit counters because
even at 10MHz, they are able to handle delays up to two minutes. This
provides a way better resolution.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200710230813.1005150-8-alexandre.belloni@bootlin.com
---
drivers/clocksource/timer-atmel-tcb.c | 63 ++++++++++++++-------------
1 file changed, 33 insertions(+), 30 deletions(-)
diff --git a/drivers/clocksource/timer-atmel-tcb.c b/drivers/clocksource/timer-atmel-tcb.c
index 423af2f9835f..7a6474acc774 100644
--- a/drivers/clocksource/timer-atmel-tcb.c
+++ b/drivers/clocksource/timer-atmel-tcb.c
@@ -27,9 +27,10 @@
* - Some chips support 32 bit counter. A single channel is used for
* this 32 bit free-running counter. the second channel is not used.
*
- * - The third channel may be used to provide a 16-bit clockevent
- * source, used in either periodic or oneshot mode. This runs
- * at 32 KiHZ, and can handle delays of up to two seconds.
+ * - The third channel may be used to provide a clockevent source, used in
+ * either periodic or oneshot mode. For 16-bit counter its runs at 32 KiHZ,
+ * and can handle delays of up to two seconds. For 32-bit counters, it runs at
+ * the same rate as the clocksource
*
* REVISIT behavior during system suspend states... we should disable
* all clocks and save the power. Easily done for clockevent devices,
@@ -47,6 +48,8 @@ static struct
} tcb_cache[3];
static u32 bmr_cache;
+static const u8 atmel_tcb_divisors[] = { 2, 8, 32, 128 };
+
static u64 tc_get_cycles(struct clocksource *cs)
{
unsigned long flags;
@@ -143,6 +146,7 @@ static unsigned long notrace tc_delay_timer_read32(void)
struct tc_clkevt_device {
struct clock_event_device clkevt;
struct clk *clk;
+ u32 rate;
void __iomem *regs;
};
@@ -151,13 +155,6 @@ static struct tc_clkevt_device *to_tc_clkevt(struct clock_event_device *clkevt)
return container_of(clkevt, struct tc_clkevt_device, clkevt);
}
-/* For now, we always use the 32K clock ... this optimizes for NO_HZ,
- * because using one of the divided clocks would usually mean the
- * tick rate can never be less than several dozen Hz (vs 0.5 Hz).
- *
- * A divided clock could be good for high resolution timers, since
- * 30.5 usec resolution can seem "low".
- */
static u32 timer_clock;
static int tc_shutdown(struct clock_event_device *d)
@@ -183,7 +180,7 @@ static int tc_set_oneshot(struct clock_event_device *d)
clk_enable(tcd->clk);
- /* slow clock, count up to RC, then irq and stop */
+ /* count up to RC, then irq and stop */
writel(timer_clock | ATMEL_TC_CPCSTOP | ATMEL_TC_WAVE |
ATMEL_TC_WAVESEL_UP_AUTO, regs + ATMEL_TC_REG(2, CMR));
writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER));
@@ -205,10 +202,10 @@ static int tc_set_periodic(struct clock_event_device *d)
*/
clk_enable(tcd->clk);
- /* slow clock, count up to RC, then irq and restart */
+ /* count up to RC, then irq and restart */
writel(timer_clock | ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO,
regs + ATMEL_TC_REG(2, CMR));
- writel((32768 + HZ / 2) / HZ, tcaddr + ATMEL_TC_REG(2, RC));
+ writel((tcd->rate + HZ / 2) / HZ, tcaddr + ATMEL_TC_REG(2, RC));
/* Enable clock and interrupts on RC compare */
writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER));
@@ -256,47 +253,55 @@ static irqreturn_t ch2_irq(int irq, void *handle)
return IRQ_NONE;
}
-static int __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx)
+static int __init setup_clkevents(struct atmel_tc *tc, int divisor_idx)
{
int ret;
struct clk *t2_clk = tc->clk[2];
int irq = tc->irq[2];
-
- ret = clk_prepare_enable(tc->slow_clk);
- if (ret)
- return ret;
+ int bits = tc->tcb_config->counter_width;
/* try to enable t2 clk to avoid future errors in mode change */
ret = clk_prepare_enable(t2_clk);
- if (ret) {
- clk_disable_unprepare(tc->slow_clk);
+ if (ret)
return ret;
- }
-
- clk_disable(t2_clk);
clkevt.regs = tc->regs;
clkevt.clk = t2_clk;
- timer_clock = clk32k_divisor_idx;
+ if (bits == 32) {
+ timer_clock = divisor_idx;
+ clkevt.rate = clk_get_rate(t2_clk) / atmel_tcb_divisors[divisor_idx];
+ } else {
+ ret = clk_prepare_enable(tc->slow_clk);
+ if (ret) {
+ clk_disable_unprepare(t2_clk);
+ return ret;
+ }
+
+ clkevt.rate = clk_get_rate(tc->slow_clk);
+ timer_clock = ATMEL_TC_TIMER_CLOCK5;
+ }
+
+ clk_disable(t2_clk);
clkevt.clkevt.cpumask = cpumask_of(0);
ret = request_irq(irq, ch2_irq, IRQF_TIMER, "tc_clkevt", &clkevt);
if (ret) {
clk_unprepare(t2_clk);
- clk_disable_unprepare(tc->slow_clk);
+ if (bits != 32)
+ clk_disable_unprepare(tc->slow_clk);
return ret;
}
- clockevents_config_and_register(&clkevt.clkevt, 32768, 1, 0xffff);
+ clockevents_config_and_register(&clkevt.clkevt, clkevt.rate, 1, BIT(bits) - 1);
return ret;
}
#else /* !CONFIG_GENERIC_CLOCKEVENTS */
-static int __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx)
+static int __init setup_clkevents(struct atmel_tc *tc, int divisor_idx)
{
/* NOTHING */
return 0;
@@ -346,8 +351,6 @@ static void __init tcb_setup_single_chan(struct atmel_tc *tc, int mck_divisor_id
writel(ATMEL_TC_SYNC, tcaddr + ATMEL_TC_BCR);
}
-static const u8 atmel_tcb_divisors[] = { 2, 8, 32, 128 };
-
static struct atmel_tcb_config tcb_rm9200_config = {
.counter_width = 16,
};
@@ -472,7 +475,7 @@ static int __init tcb_clksrc_init(struct device_node *node)
goto err_disable_t1;
/* channel 2: periodic and oneshot timer support */
- ret = setup_clkevents(&tc, ATMEL_TC_TIMER_CLOCK5);
+ ret = setup_clkevents(&tc, best_divisor_idx);
if (ret)
goto err_unregister_clksrc;
--
2.25.1
next prev parent reply other threads:[~2020-07-23 15:27 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-23 15:24 [GIT PULL] timer drives for v5.9 Daniel Lezcano
2020-07-23 15:26 ` [PATCH 01/16] dt-bindings: atmel-tcb: convert bindings to json-schema Daniel Lezcano
2020-07-23 15:26 ` [PATCH 02/16] dt-bindings: microchip: atmel,at91rm9200-tcb: add sama5d2 compatible Daniel Lezcano
2020-07-23 15:26 ` [PATCH 03/16] ARM: dts: at91: sama5d2: add TCB GCLK Daniel Lezcano
2020-07-23 15:26 ` [PATCH 04/16] ARM: at91: add atmel tcb capabilities Daniel Lezcano
2020-07-23 15:26 ` [PATCH 05/16] clocksource/drivers/timer-atmel-tcb: Rework 32khz clock selection Daniel Lezcano
2020-07-23 15:26 ` [PATCH 06/16] clocksource/drivers/timer-atmel-tcb: Fill tcb_config Daniel Lezcano
2020-07-23 15:26 ` Daniel Lezcano [this message]
2020-07-23 15:26 ` [PATCH 08/16] clocksource/drivers/timer-atmel-tcb: Allow selecting first divider Daniel Lezcano
2020-07-23 15:26 ` [PATCH 09/16] clocksource/drivers/timer-atmel-tcb: Add sama5d2 support Daniel Lezcano
2020-07-23 15:26 ` [PATCH 10/16] clocksource/drivers/ingenic: Add high resolution timer support for SMP/SMT Daniel Lezcano
2020-07-23 15:26 ` [PATCH 11/16] clocksource/drivers/imx: Add support for i.MX TPM driver with ARM64 Daniel Lezcano
2020-07-23 15:26 ` [PATCH 12/16] clocksource/drivers/sh_cmt: Use "kHz" for kilohertz Daniel Lezcano
2020-07-23 15:26 ` [PATCH 13/16] clocksource/drivers/nomadik-mtu: Handle 32kHz clock Daniel Lezcano
2020-07-23 15:26 ` [PATCH 14/16] clocksource/drivers: Replace HTTP links with HTTPS ones Daniel Lezcano
2020-07-23 15:26 ` [PATCH 15/16] dt-bindings: timer: Add Ingenic X1000 OST bindings Daniel Lezcano
2020-07-23 15:26 ` [PATCH 16/16] clocksource/drivers/ingenic: Add support for the Ingenic X1000 OST Daniel Lezcano
2020-07-27 14:04 ` [PATCH 01/16] dt-bindings: atmel-tcb: convert bindings to json-schema Lee Jones
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