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From: Alain Volmat <alain.volmat@st.com>
To: <broonie@kernel.org>, <amelie.delaunay@st.com>
Cc: <mcoquelin.stm32@gmail.com>, <alexandre.torgue@st.com>,
	<linux-spi@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <fabrice.gasnier@st.com>,
	<alain.volmat@st.com>
Subject: [PATCH 08/18] spi: stm32h7: fix dbg/warn/err conditions in irq handler
Date: Wed, 5 Aug 2020 09:02:03 +0200	[thread overview]
Message-ID: <1596610933-32599-9-git-send-email-alain.volmat@st.com> (raw)
In-Reply-To: <1596610933-32599-1-git-send-email-alain.volmat@st.com>

From: Amelie Delaunay <amelie.delaunay@st.com>

Make spurious interrupts visible. We do not expect to receive
them, so rise at least a warning if it happens.

Don't bother repeating the suspended RX messages; to avoid RX
overrun we have set SPI_CR1_MASRX that enables the automatic
suspended RX so, mainly in irq mode, it's normal that we will
receive SUSP interrupts every time the CPU is too much loaded
or the spi speed too high and we fail to remove on-time the
data from the RX queue. Moreover, when the CPU is overloaded
there is a delay while serving the interrupt. This forces
inactivity on the SPI bus between bytes. So the warning message
"System too slow, spi speed not guaranteed" is inaccurate; the
term "spi speed" is currently used in kernel for the toggling
frequency of the spi CLK pin, which is driven by HW and is not
impacted by CPU overload. The correct term should be
"data throughput".

RX overrun is an error condition that signals a corrupted RX
stream both in dma and in irq modes. Report the error and
abort the transfer in either cases.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Antonio Borneo <antonio.borneo@st.com>
Signed-off-by: Alain Volmat <alain.volmat@st.com>
---
 drivers/spi/spi-stm32.c | 19 +++++++------------
 1 file changed, 7 insertions(+), 12 deletions(-)

diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
index 06478643855a..6731e3ff0e50 100644
--- a/drivers/spi/spi-stm32.c
+++ b/drivers/spi/spi-stm32.c
@@ -904,14 +904,16 @@ static irqreturn_t stm32h7_spi_irq_thread(int irq, void *dev_id)
 	mask &= sr;
 
 	if (!mask) {
-		dev_dbg(spi->dev, "spurious IT (sr=0x%08x, ier=0x%08x)\n",
-			sr, ier);
+		dev_warn(spi->dev, "spurious IT (sr=0x%08x, ier=0x%08x)\n",
+			 sr, ier);
 		spin_unlock_irqrestore(&spi->lock, flags);
 		return IRQ_NONE;
 	}
 
 	if (mask & STM32H7_SPI_SR_SUSP) {
-		dev_warn(spi->dev, "Communication suspended\n");
+		dev_warn_once(spi->dev,
+			      "System too slow is limiting data throughput\n");
+
 		if (!spi->cur_usedma && (spi->rx_buf && (spi->rx_len > 0)))
 			stm32h7_spi_read_rxfifo(spi);
 		/*
@@ -924,15 +926,8 @@ static irqreturn_t stm32h7_spi_irq_thread(int irq, void *dev_id)
 	}
 
 	if (mask & STM32H7_SPI_SR_OVR) {
-		dev_warn(spi->dev, "Overrun: received value discarded\n");
-		if (!spi->cur_usedma && (spi->rx_buf && (spi->rx_len > 0)))
-			stm32h7_spi_read_rxfifo(spi);
-		/*
-		 * If overrun is detected while using DMA, it means that
-		 * something went wrong, so stop the current transfer
-		 */
-		if (spi->cur_usedma)
-			end = true;
+		dev_err(spi->dev, "Overrun: RX data lost\n");
+		end = true;
 		ifcr |= STM32H7_SPI_SR_OVR;
 	}
 
-- 
2.7.4


  parent reply	other threads:[~2020-08-05  7:05 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-05  7:01 [PATCH 00/18] spi: stm32: various driver enhancements Alain Volmat
2020-08-05  7:01 ` [PATCH 01/18] spi: stm32-spi: driver uses reset controller only at init Alain Volmat
2020-08-05  7:01 ` [PATCH 02/18] spi: stm32-spi: defer probe for reset Alain Volmat
2020-08-05 10:49   ` Mark Brown
2020-08-07 13:42     ` Alain Volmat
2020-08-07 14:01       ` Mark Brown
2020-08-05  7:01 ` [PATCH 03/18] spi: stm32h7: remove unused mode fault MODF event handling Alain Volmat
2020-08-05 10:51   ` Mark Brown
2020-08-05  7:01 ` [PATCH 04/18] spi: stm32: use bitfield macros Alain Volmat
2020-08-05  7:02 ` [PATCH 05/18] spi: stm32h7: replace private SPI_1HZ_NS with NSEC_PER_SEC Alain Volmat
2020-08-05  7:02 ` [PATCH 06/18] spi: stm32h7: fix irq handler Alain Volmat
2020-08-05  7:02 ` [PATCH 07/18] spi: stm32h7: rework rx fifo read function Alain Volmat
2020-08-05  7:02 ` Alain Volmat [this message]
2020-08-05  7:02 ` [PATCH 09/18] spi: stm32h7: fix race condition at end of transfer Alain Volmat
2020-08-05 10:53   ` Mark Brown
2020-08-05  7:02 ` [PATCH 10/18] spi: stm32: wait for completion in transfer_one() Alain Volmat
2020-08-05 10:58   ` Mark Brown
2020-08-05  7:02 ` [PATCH 11/18] spi: stm32: fix fifo threshold level in case of short transfer Alain Volmat
2020-08-05 10:59   ` Mark Brown
2020-08-05  7:02 ` [PATCH 12/18] spi: stm32: move spi disable out of irq handler Alain Volmat
2020-08-05 11:01   ` Mark Brown
2020-08-05  7:02 ` [PATCH 13/18] spi: stm32h7: fix handling of dma transfer completed Alain Volmat
2020-08-05 11:02   ` Mark Brown
2020-08-05  7:02 ` [PATCH 14/18] spi: stm32: improve suspend/resume management Alain Volmat
2020-08-05  7:02 ` [PATCH 15/18] spi: stm32: fix stm32_spi_prepare_mbr in case of odd clk_rate Alain Volmat
2020-08-05 11:02   ` Mark Brown
2020-08-05  7:02 ` [PATCH 16/18] spi: stm32: always perform registers configuration prior to transfer Alain Volmat
2020-08-05 11:03   ` Mark Brown
2020-08-05  7:02 ` [PATCH 17/18] spi: stm32: properly handle 0 byte transfer Alain Volmat
2020-08-05  7:02 ` [PATCH 18/18] spi: stm32h7: ensure message are smaller than max size Alain Volmat

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