From: Zhiqiang Hou <Zhiqiang.Hou@nxp.com>
To: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, bhelgaas@google.com,
robh+dt@kernel.org, shawnguo@kernel.org, leoyang.li@nxp.com,
lorenzo.pieralisi@arm.com, gustavo.pimentel@synopsys.com
Cc: minghuan.Lian@nxp.com, mingkai.hu@nxp.com, roy.zang@nxp.com,
Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Subject: [PATCH 1/7] PCI: dwc: Fix a bug of the case dw_pci->ops is NULL
Date: Mon, 7 Sep 2020 13:37:55 +0800 [thread overview]
Message-ID: <20200907053801.22149-2-Zhiqiang.Hou@nxp.com> (raw)
In-Reply-To: <20200907053801.22149-1-Zhiqiang.Hou@nxp.com>
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
The dw_pci->ops may be a NULL, and fix it by adding one more check.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
drivers/pci/controller/dwc/pcie-designware.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index b723e0cc41fb..bdf8938da9cd 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -140,7 +140,7 @@ u32 dw_pcie_read_dbi(struct dw_pcie *pci, u32 reg, size_t size)
int ret;
u32 val;
- if (pci->ops->read_dbi)
+ if (pci->ops && pci->ops->read_dbi)
return pci->ops->read_dbi(pci, pci->dbi_base, reg, size);
ret = dw_pcie_read(pci->dbi_base + reg, size, &val);
@@ -155,7 +155,7 @@ void dw_pcie_write_dbi(struct dw_pcie *pci, u32 reg, size_t size, u32 val)
{
int ret;
- if (pci->ops->write_dbi) {
+ if (pci->ops && pci->ops->write_dbi) {
pci->ops->write_dbi(pci, pci->dbi_base, reg, size, val);
return;
}
@@ -200,7 +200,7 @@ u32 dw_pcie_read_atu(struct dw_pcie *pci, u32 reg, size_t size)
int ret;
u32 val;
- if (pci->ops->read_dbi)
+ if (pci->ops && pci->ops->read_dbi)
return pci->ops->read_dbi(pci, pci->atu_base, reg, size);
ret = dw_pcie_read(pci->atu_base + reg, size, &val);
@@ -214,7 +214,7 @@ void dw_pcie_write_atu(struct dw_pcie *pci, u32 reg, size_t size, u32 val)
{
int ret;
- if (pci->ops->write_dbi) {
+ if (pci->ops && pci->ops->write_dbi) {
pci->ops->write_dbi(pci, pci->atu_base, reg, size, val);
return;
}
@@ -283,7 +283,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,
{
u32 retries, val;
- if (pci->ops->cpu_addr_fixup)
+ if (pci->ops && pci->ops->cpu_addr_fixup)
cpu_addr = pci->ops->cpu_addr_fixup(pci, cpu_addr);
if (pci->iatu_unroll_enabled) {
@@ -470,7 +470,7 @@ int dw_pcie_link_up(struct dw_pcie *pci)
{
u32 val;
- if (pci->ops->link_up)
+ if (pci->ops && pci->ops->link_up)
return pci->ops->link_up(pci);
val = readl(pci->dbi_base + PCIE_PORT_DEBUG1);
--
2.17.1
next prev parent reply other threads:[~2020-09-07 5:46 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-07 5:37 [PATCH 0/7] PCI: layerscape: Add power management support Zhiqiang Hou
2020-09-07 5:37 ` Zhiqiang Hou [this message]
2020-09-09 9:28 ` [PATCH 1/7] PCI: dwc: Fix a bug of the case dw_pci->ops is NULL Gustavo Pimentel
2020-09-13 16:17 ` Z.q. Hou
2020-09-15 1:16 ` Rob Herring
2020-09-15 3:39 ` Z.q. Hou
2020-09-07 5:37 ` [PATCH 2/7] PCI: layerscape: Change to use the DWC common link-up check function Zhiqiang Hou
2020-09-15 1:19 ` Rob Herring
2020-09-15 6:22 ` Z.q. Hou
2020-09-07 5:37 ` [PATCH 3/7] dt-bindings: pci: layerscape-pci: Add a optional property big-endian Zhiqiang Hou
2020-09-15 1:30 ` Rob Herring
2020-09-15 3:39 ` Z.q. Hou
2020-09-07 5:37 ` [PATCH 4/7] arm64: dts: layerscape: Add big-endian property for PCIe nodes Zhiqiang Hou
2020-09-07 5:37 ` [PATCH 5/7] dt-bindings: pci: layerscape-pci: Update the description of SCFG property Zhiqiang Hou
2020-09-15 1:31 ` Rob Herring
2020-09-15 3:39 ` Z.q. Hou
2020-09-07 5:38 ` [PATCH 6/7] dts: arm64: ls1043a: Add SCFG phandle for PCIe nodes Zhiqiang Hou
2020-09-21 13:16 ` Shawn Guo
2020-09-21 16:46 ` Z.q. Hou
2020-09-07 5:38 ` [PATCH 7/7] PCI: layerscape: Add power management support Zhiqiang Hou
2020-09-15 1:30 ` Rob Herring
2020-09-15 6:44 ` Z.q. Hou
2021-03-23 11:15 ` [PATCH 0/7] " Lorenzo Pieralisi
2021-03-24 4:10 ` Z.q. Hou
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