From: Nicolin Chen <nicoleotsuka@gmail.com>
To: krzk@kernel.org, joro@8bytes.org
Cc: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org,
linux-tegra@vger.kernel.org, jonathanh@nvidia.com,
vdumpa@nvidia.com, thierry.reding@gmail.com
Subject: [RESEND][PATCH 2/2] memory: tegra: Correct num_tlb_lines for tegra210
Date: Thu, 17 Sep 2020 04:31:55 -0700 [thread overview]
Message-ID: <20200917113155.13438-3-nicoleotsuka@gmail.com> (raw)
In-Reply-To: <20200917113155.13438-1-nicoleotsuka@gmail.com>
According to Tegra210 TRM, the default value of TLB_ACTIVE_LINES
field of register MC_SMMU_TLB_CONFIG_0 is 0x30. So num_tlb_lines
should be 48 (0x30) rather than 32 (0x20).
Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
---
drivers/memory/tegra/tegra210.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/memory/tegra/tegra210.c b/drivers/memory/tegra/tegra210.c
index 51b537cfa5a7..4fbf8cbc6666 100644
--- a/drivers/memory/tegra/tegra210.c
+++ b/drivers/memory/tegra/tegra210.c
@@ -1074,7 +1074,7 @@ static const struct tegra_smmu_soc tegra210_smmu_soc = {
.num_groups = ARRAY_SIZE(tegra210_groups),
.supports_round_robin_arbitration = true,
.supports_request_limit = true,
- .num_tlb_lines = 32,
+ .num_tlb_lines = 48,
.num_asids = 128,
};
--
2.17.1
next prev parent reply other threads:[~2020-09-17 11:51 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-17 11:31 [RESEND][PATCH 0/2] iommu/tegra-smmu: Fix TLB line for Tegra210 Nicolin Chen
2020-09-17 11:31 ` [RESEND][PATCH 1/2] iommu/tegra-smmu: Fix tlb_mask Nicolin Chen
2020-09-17 11:31 ` Nicolin Chen [this message]
2020-09-18 9:07 ` [RESEND][PATCH 0/2] iommu/tegra-smmu: Fix TLB line for Tegra210 Joerg Roedel
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