[06/10] clocksource/drivers/sp804: Remove a mismatched comment
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Message ID 20200924090534.2004630-6-daniel.lezcano@linaro.org
State Accepted
Commit 2f71078e7753b2fbba62999aa46c2fad16df9d98
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  • [01/10] dt-bindings: timer: renesas,cmt: Document r8a7742 CMT support
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Commit Message

Daniel Lezcano Sept. 24, 2020, 9:05 a.m. UTC 
From: Zhen Lei <thunder.leizhen@huawei.com>

writel(0, base + TIMER_CTRL);
... ...
writel(xxx | TIMER_CTRL_PERIODIC, base + TIMER_CTRL);

The timer is just temporarily disabled, and it will be set to periodic
mode later.

The description of the field TimerMode of the register TimerXControl
as shown below:
0 = Timer module is in free-running mode (default)
1 = Timer module is in periodic mode.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200918132237.3552-5-thunder.leizhen@huawei.com
---
 drivers/clocksource/timer-sp804.c | 1 -
 1 file changed, 1 deletion(-)

Patch
diff mbox series 

diff --git a/drivers/clocksource/timer-sp804.c b/drivers/clocksource/timer-sp804.c
index 097f5a83163c..a443f392a8e7 100644
--- a/drivers/clocksource/timer-sp804.c
+++ b/drivers/clocksource/timer-sp804.c
@@ -76,7 +76,6 @@  int __init sp804_clocksource_and_sched_clock_init(void __iomem *base,
 	if (rate < 0)
 		return -EINVAL;
 
-	/* setup timer 0 as free-running clocksource */
 	writel(0, base + TIMER_CTRL);
 	writel(0xffffffff, base + TIMER_LOAD);
 	writel(0xffffffff, base + TIMER_VALUE);