From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: tglx@linutronix.de
Cc: Zhen Lei <thunder.leizhen@huawei.com>,
linux-kernel@vger.kernel.org (open list:CLOCKSOURCE,
CLOCKEVENT DRIVERS)
Subject: [PATCH 07/10] clocksource/drivers/sp804: Prepare for support non-standard register offset
Date: Thu, 24 Sep 2020 11:05:31 +0200 [thread overview]
Message-ID: <20200924090534.2004630-7-daniel.lezcano@linaro.org> (raw)
In-Reply-To: <20200924090534.2004630-1-daniel.lezcano@linaro.org>
From: Zhen Lei <thunder.leizhen@huawei.com>
Add two local variables: timer1_base and timer2_base in sp804_of_init(),
to avoid repeatedly calculate the base address of timer2, and make it
easier to recognize timer1. Hope to make the next patch looks more clear.
No functional change.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200918132237.3552-6-thunder.leizhen@huawei.com
---
drivers/clocksource/timer-sp804.c | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/clocksource/timer-sp804.c b/drivers/clocksource/timer-sp804.c
index a443f392a8e7..471c5c6aaf51 100644
--- a/drivers/clocksource/timer-sp804.c
+++ b/drivers/clocksource/timer-sp804.c
@@ -188,6 +188,8 @@ static int __init sp804_of_init(struct device_node *np)
{
static bool initialized = false;
void __iomem *base;
+ void __iomem *timer1_base;
+ void __iomem *timer2_base;
int irq, ret = -EINVAL;
u32 irq_num = 0;
struct clk *clk1, *clk2;
@@ -197,9 +199,12 @@ static int __init sp804_of_init(struct device_node *np)
if (!base)
return -ENXIO;
+ timer1_base = base;
+ timer2_base = base + TIMER_2_BASE;
+
/* Ensure timers are disabled */
- writel(0, base + TIMER_CTRL);
- writel(0, base + TIMER_2_BASE + TIMER_CTRL);
+ writel(0, timer1_base + TIMER_CTRL);
+ writel(0, timer2_base + TIMER_CTRL);
if (initialized || !of_device_is_available(np)) {
ret = -EINVAL;
@@ -228,21 +233,21 @@ static int __init sp804_of_init(struct device_node *np)
of_property_read_u32(np, "arm,sp804-has-irq", &irq_num);
if (irq_num == 2) {
- ret = sp804_clockevents_init(base + TIMER_2_BASE, irq, clk2, name);
+ ret = sp804_clockevents_init(timer2_base, irq, clk2, name);
if (ret)
goto err;
- ret = sp804_clocksource_and_sched_clock_init(base,
+ ret = sp804_clocksource_and_sched_clock_init(timer1_base,
name, clk1, 1);
if (ret)
goto err;
} else {
- ret = sp804_clockevents_init(base, irq, clk1, name);
+ ret = sp804_clockevents_init(timer1_base, irq, clk1, name);
if (ret)
goto err;
- ret = sp804_clocksource_and_sched_clock_init(base + TIMER_2_BASE,
+ ret = sp804_clocksource_and_sched_clock_init(timer2_base,
name, clk2, 1);
if (ret)
goto err;
--
2.25.1
next prev parent reply other threads:[~2020-09-24 9:06 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-24 9:04 [GIT PULL] timer drivers for v5.10 Daniel Lezcano
2020-09-24 9:05 ` [PATCH 01/10] dt-bindings: timer: renesas,cmt: Document r8a7742 CMT support Daniel Lezcano
2020-09-24 9:05 ` [PATCH 02/10] dt-bindings: timer: renesas,cmt: Document r8a774e1 " Daniel Lezcano
2020-09-24 9:05 ` [PATCH 03/10] clocksource/drivers/sp804: Cleanup clk_get_sys() Daniel Lezcano
2020-09-24 9:05 ` [PATCH 04/10] clocksource/drivers/sp804: Remove unused sp804_timer_disable() and timer-sp804.h Daniel Lezcano
2020-09-24 9:05 ` [PATCH 05/10] clocksource/drivers/sp804: Delete the leading "__" of some functions Daniel Lezcano
2020-09-24 9:05 ` [PATCH 06/10] clocksource/drivers/sp804: Remove a mismatched comment Daniel Lezcano
2020-09-24 9:05 ` Daniel Lezcano [this message]
2020-09-24 9:05 ` [PATCH 08/10] clocksource/drivers/sp804: Support non-standard register offset Daniel Lezcano
2020-09-24 9:05 ` [PATCH 09/10] clocksource/drivers/sp804: Add support for Hisilicon sp804 timer Daniel Lezcano
2020-09-24 9:05 ` [PATCH 10/10] clocksource/drivers/sp804: Enable Hisilicon sp804 timer 64bit mode Daniel Lezcano
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