From: Enric Balletbo i Serra <enric.balletbo@collabora.com>
To: linux-kernel@vger.kernel.org
Cc: Collabora Kernel ML <kernel@collabora.com>,
fparent@baylibre.com, matthias.bgg@gmail.com,
drinkcat@chromium.org, hsinyi@chromium.org,
weiyi.lu@mediatek.com, Matthias Brugger <mbrugger@suse.com>,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org
Subject: [PATCH v2 04/12] soc: mediatek: pm-domains: Add bus protection protocol
Date: Thu, 1 Oct 2020 18:01:46 +0200 [thread overview]
Message-ID: <20201001160154.3587848-5-enric.balletbo@collabora.com> (raw)
In-Reply-To: <20201001160154.3587848-1-enric.balletbo@collabora.com>
From: Matthias Brugger <mbrugger@suse.com>
Bus protection will need to update more then one register
in infracfg. Add support for several operations.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
Changes in v2: None
drivers/soc/mediatek/mtk-pm-domains.c | 44 +++++++++++++++++++--------
1 file changed, 31 insertions(+), 13 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
index 68886bf437f9..cc8915b53c7e 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.c
+++ b/drivers/soc/mediatek/mtk-pm-domains.c
@@ -54,6 +54,8 @@
#define PWR_STATUS_AUDIO BIT(24)
#define PWR_STATUS_USB BIT(25)
+#define SPM_MAX_BUS_PROT_DATA 3
+
struct scpsys_bus_prot_data {
u32 bus_prot_mask;
bool bus_prot_reg_update;
@@ -74,7 +76,7 @@ struct scpsys_domain_data {
u32 sram_pdn_bits;
u32 sram_pdn_ack_bits;
u8 caps;
- const struct scpsys_bus_prot_data bp_infracfg;
+ const struct scpsys_bus_prot_data bp_infracfg[SPM_MAX_BUS_PROT_DATA];
};
struct scpsys_domain {
@@ -162,24 +164,40 @@ static int scpsys_sram_disable(struct scpsys_domain *pd)
static int scpsys_bus_protect_enable(struct scpsys_domain *pd)
{
- const struct scpsys_bus_prot_data *bp_data = &pd->data->bp_infracfg;
+ const struct scpsys_bus_prot_data *bpd = pd->data->bp_infracfg;
+ int i, ret;
- if (!bp_data->bus_prot_mask)
- return 0;
+ for (i = 0; i < SPM_MAX_BUS_PROT_DATA; i++) {
+ if (!bpd[i].bus_prot_mask)
+ break;
- return mtk_infracfg_set_bus_protection(pd->infracfg, bp_data->bus_prot_mask,
- bp_data->bus_prot_reg_update);
+ ret = mtk_infracfg_set_bus_protection(pd->infracfg,
+ bpd[i].bus_prot_mask,
+ bpd[i].bus_prot_reg_update);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
}
static int scpsys_bus_protect_disable(struct scpsys_domain *pd)
{
- const struct scpsys_bus_prot_data *bp_data = &pd->data->bp_infracfg;
+ const struct scpsys_bus_prot_data *bpd = pd->data->bp_infracfg;
+ int i, ret;
+
+ for (i = 0; i < SPM_MAX_BUS_PROT_DATA; i++) {
+ if (!bpd[i].bus_prot_mask)
+ return 0;
- if (!bp_data->bus_prot_mask)
- return 0;
+ ret = mtk_infracfg_clear_bus_protection(pd->infracfg,
+ bpd[i].bus_prot_mask,
+ bpd[i].bus_prot_reg_update);
+ if (ret)
+ return ret;
+ }
- return mtk_infracfg_clear_bus_protection(pd->infracfg, bp_data->bus_prot_mask,
- bp_data->bus_prot_reg_update);
+ return 0;
}
static int scpsys_power_on(struct generic_pm_domain *genpd)
@@ -479,7 +497,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
.ctl_offs = SPM_DIS_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
.sram_pdn_ack_bits = GENMASK(12, 12),
- .bp_infracfg = {
+ .bp_infracfg[0] = {
.bus_prot_reg_update = true,
.bus_prot_mask = MT8173_TOP_AXI_PROT_EN_MM_M0 |
MT8173_TOP_AXI_PROT_EN_MM_M1,
@@ -521,7 +539,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
.ctl_offs = SPM_MFG_PWR_CON,
.sram_pdn_bits = GENMASK(13, 8),
.sram_pdn_ack_bits = GENMASK(21, 16),
- .bp_infracfg = {
+ .bp_infracfg[0] = {
.bus_prot_reg_update = true,
.bus_prot_mask = MT8173_TOP_AXI_PROT_EN_MFG_S |
MT8173_TOP_AXI_PROT_EN_MFG_M0 |
--
2.28.0
next prev parent reply other threads:[~2020-10-01 16:02 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-01 16:01 [PATCH v2 00/12] soc: mediatek: pm-domains: Add new driver for SCPSYS power domains controller Enric Balletbo i Serra
2020-10-01 16:01 ` [PATCH v2 01/12] dt-bindings: power: Add bindings for the Mediatek " Enric Balletbo i Serra
2020-10-01 16:01 ` [PATCH v2 02/12] soc: mediatek: Add MediaTek SCPSYS power domains Enric Balletbo i Serra
2020-10-05 1:39 ` Nicolas Boichat
2020-10-26 15:17 ` Enric Balletbo i Serra
2020-10-27 0:19 ` Nicolas Boichat
2020-10-27 16:25 ` Enric Balletbo i Serra
2020-10-28 1:13 ` Nicolas Boichat
2020-10-30 10:29 ` Enric Balletbo i Serra
2020-10-30 12:44 ` Nicolas Boichat
2020-10-01 16:01 ` [PATCH v2 03/12] arm64: dts: mediatek: Add mt8173 power domain controller Enric Balletbo i Serra
2020-10-01 16:01 ` Enric Balletbo i Serra [this message]
2020-10-01 16:01 ` [PATCH v2 05/12] soc: mediatek: pm_domains: Make bus protection generic Enric Balletbo i Serra
2020-10-01 16:01 ` [PATCH v2 06/12] soc: mediatek: pm-domains: Add SMI block as bus protection block Enric Balletbo i Serra
2020-10-02 8:56 ` Matthias Brugger
2020-10-05 1:48 ` Nicolas Boichat
2020-10-05 10:28 ` Matthias Brugger
2020-10-26 15:18 ` Enric Balletbo i Serra
2020-10-26 15:18 ` Enric Balletbo i Serra
2020-10-01 16:01 ` [PATCH v2 07/12] soc: mediatek: pm-domains: Add extra sram control Enric Balletbo i Serra
2020-10-02 9:24 ` Matthias Brugger
2020-10-01 16:01 ` [PATCH v2 08/12] soc: mediatek: pm-domains: Add subsystem clocks Enric Balletbo i Serra
2020-10-02 9:04 ` Matthias Brugger
2020-10-26 15:17 ` Enric Balletbo i Serra
2020-10-01 16:01 ` [PATCH v2 09/12] soc: mediatek: pm-domains: Allow bus protection to ignore clear ack Enric Balletbo i Serra
2020-10-01 16:01 ` [PATCH v2 10/12] dt-bindings: power: Add MT8183 power domains Enric Balletbo i Serra
2020-10-01 16:01 ` [PATCH v2 11/12] soc: mediatek: pm-domains: Add support for mt8183 Enric Balletbo i Serra
2020-10-01 16:01 ` [PATCH v2 12/12] arm64: dts: mediatek: Add mt8183 power domains controller Enric Balletbo i Serra
2020-10-02 9:11 ` Matthias Brugger
2020-10-11 14:55 ` kernel test robot
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