From: Nicolin Chen <nicoleotsuka@gmail.com>
To: krzk@kernel.org, thierry.reding@gmail.com, robh+dt@kernel.org
Cc: jonathanh@nvidia.com, linux-tegra@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 5/5] memory: tegra: Complete tegra210_swgroups
Date: Wed, 7 Oct 2020 17:37:46 -0700 [thread overview]
Message-ID: <20201008003746.25659-6-nicoleotsuka@gmail.com> (raw)
In-Reply-To: <20201008003746.25659-1-nicoleotsuka@gmail.com>
According to Tegra X1 TRM, there are missing swgroups in the
tegra210_swgroups list. So this patch adds them to the list.
Note that the TEGRA_SWGROUP_GPU (in list) should be actually
TEGRA_SWGROUP_GPUB (in TRM), yet TEGRA_SWGROUP_GPU (in TRM)
is not being used -- only TEGRA_SWGROUP_GPUB (in TRM) is. So
this patch does not add TEGRA_SWGROUP_GPU (in TRM) and keeps
TEGRA_SWGROUP_GPU (in list) as it is.
Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
---
drivers/memory/tegra/tegra210.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/memory/tegra/tegra210.c b/drivers/memory/tegra/tegra210.c
index b400802c9f14..b3bbc5a05ba1 100644
--- a/drivers/memory/tegra/tegra210.c
+++ b/drivers/memory/tegra/tegra210.c
@@ -1028,6 +1028,8 @@ static const struct tegra_smmu_swgroup tegra210_swgroups[] = {
{ .name = "hda", .swgroup = TEGRA_SWGROUP_HDA, .reg = 0x254 },
{ .name = "isp2", .swgroup = TEGRA_SWGROUP_ISP2, .reg = 0x258 },
{ .name = "nvenc", .swgroup = TEGRA_SWGROUP_NVENC, .reg = 0x264 },
+ { .name = "nv", .swgroup = TEGRA_SWGROUP_NV, .reg = 0x268 },
+ { .name = "nv2", .swgroup = TEGRA_SWGROUP_NV2, .reg = 0x26c },
{ .name = "ppcs", .swgroup = TEGRA_SWGROUP_PPCS, .reg = 0x270 },
{ .name = "sata", .swgroup = TEGRA_SWGROUP_SATA, .reg = 0x274 },
{ .name = "vi", .swgroup = TEGRA_SWGROUP_VI, .reg = 0x280 },
@@ -1036,19 +1038,27 @@ static const struct tegra_smmu_swgroup tegra210_swgroups[] = {
{ .name = "xusb_dev", .swgroup = TEGRA_SWGROUP_XUSB_DEV, .reg = 0x28c },
{ .name = "a9avp", .swgroup = TEGRA_SWGROUP_A9AVP, .reg = 0x290 },
{ .name = "tsec", .swgroup = TEGRA_SWGROUP_TSEC, .reg = 0x294 },
+ { .name = "ppcs1", .swgroup = TEGRA_SWGROUP_PPCS1, .reg = 0x298 },
+ { .name = "dc1", .swgroup = TEGRA_SWGROUP_DC1, .reg = 0xa88 },
{ .name = "sdmmc1a", .swgroup = TEGRA_SWGROUP_SDMMC1A, .reg = 0xa94 },
{ .name = "sdmmc2a", .swgroup = TEGRA_SWGROUP_SDMMC2A, .reg = 0xa98 },
{ .name = "sdmmc3a", .swgroup = TEGRA_SWGROUP_SDMMC3A, .reg = 0xa9c },
{ .name = "sdmmc4a", .swgroup = TEGRA_SWGROUP_SDMMC4A, .reg = 0xaa0 },
{ .name = "isp2b", .swgroup = TEGRA_SWGROUP_ISP2B, .reg = 0xaa4 },
{ .name = "gpu", .swgroup = TEGRA_SWGROUP_GPU, .reg = 0xaac },
+ { .name = "ppcs2", .swgroup = TEGRA_SWGROUP_PPCS2, .reg = 0xab0 },
{ .name = "nvdec", .swgroup = TEGRA_SWGROUP_NVDEC, .reg = 0xab4 },
{ .name = "ape", .swgroup = TEGRA_SWGROUP_APE, .reg = 0xab8 },
{ .name = "se", .swgroup = TEGRA_SWGROUP_SE, .reg = 0xabc },
{ .name = "nvjpg", .swgroup = TEGRA_SWGROUP_NVJPG, .reg = 0xac0 },
+ { .name = "hc1", .swgroup = TEGRA_SWGROUP_HC1, .reg = 0xac4 },
+ { .name = "se1", .swgroup = TEGRA_SWGROUP_SE1, .reg = 0xac8 },
{ .name = "axiap", .swgroup = TEGRA_SWGROUP_AXIAP, .reg = 0xacc },
{ .name = "etr", .swgroup = TEGRA_SWGROUP_ETR, .reg = 0xad0 },
{ .name = "tsecb", .swgroup = TEGRA_SWGROUP_TSECB, .reg = 0xad4 },
+ { .name = "tsec1", .swgroup = TEGRA_SWGROUP_TSEC1, .reg = 0xad8 },
+ { .name = "tsecb1", .swgroup = TEGRA_SWGROUP_TSECB1, .reg = 0xadc },
+ { .name = "nvdec1", .swgroup = TEGRA_SWGROUP_NVDEC1, .reg = 0xae0 },
};
static const unsigned int tegra210_group_display[] = {
--
2.17.1
next prev parent reply other threads:[~2020-10-08 0:45 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-08 0:37 [PATCH 0/5] memory: tegra: Fix client list and add swgroups Nicolin Chen
2020-10-08 0:37 ` [PATCH 1/5] memory: tegra: Correct la.reg address of seswr Nicolin Chen
2020-10-09 12:11 ` Thierry Reding
2020-10-26 20:14 ` Krzysztof Kozlowski
2020-10-08 0:37 ` [PATCH 2/5] memory: tegra: Correct tegra210_mc_clients def values Nicolin Chen
2020-10-09 12:14 ` Thierry Reding
2020-10-26 20:15 ` Krzysztof Kozlowski
2020-10-08 0:37 ` [PATCH 3/5] memory: tegra: Sort tegra210_swgroups by reg address Nicolin Chen
2020-10-08 10:32 ` Krzysztof Kozlowski
2020-10-08 20:26 ` Nicolin Chen
2020-10-12 16:43 ` Krzysztof Kozlowski
2020-10-12 18:57 ` Nicolin Chen
2020-10-09 12:15 ` Thierry Reding
2020-10-26 20:17 ` Krzysztof Kozlowski
2020-10-08 0:37 ` [PATCH 4/5] dt-bindings: memory: tegra: Add missing swgroups Nicolin Chen
2020-10-09 12:21 ` Thierry Reding
2020-10-09 15:52 ` Nicolin Chen
2020-10-26 20:17 ` Krzysztof Kozlowski
2020-10-27 12:55 ` Thierry Reding
2020-10-27 23:31 ` Nicolin Chen
2020-10-27 19:54 ` Krzysztof Kozlowski
2020-10-08 0:37 ` Nicolin Chen [this message]
2020-10-27 13:01 ` [PATCH 5/5] memory: tegra: Complete tegra210_swgroups Thierry Reding
2020-10-27 23:37 ` Nicolin Chen
2020-11-20 16:27 ` Thierry Reding
2020-11-22 11:07 ` Krzysztof Kozlowski
2020-10-08 10:29 ` [PATCH 0/5] memory: tegra: Fix client list and add swgroups Krzysztof Kozlowski
2020-10-08 20:27 ` Nicolin Chen
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