From: Zhen Lei <thunder.leizhen@huawei.com>
To: Wei Xu <xuwei5@hisilicon.com>, Rob Herring <robh+dt@kernel.org>,
devicetree <devicetree@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>
Cc: Zhen Lei <thunder.leizhen@huawei.com>
Subject: [PATCH 01/11] arm64: dts: hisilicon: normalize the node name of the ITS devices
Date: Mon, 12 Oct 2020 21:17:29 +0800 [thread overview]
Message-ID: <20201012131739.1655-2-thunder.leizhen@huawei.com> (raw)
In-Reply-To: <20201012131739.1655-1-thunder.leizhen@huawei.com>
Change the node name of the ITS devices to match
"^(msi-controller|gic-its|interrupt-controller)@[0-9a-f]+$". Although
"interrupt-controller" is allowed, but "msi-controller" is preferred.
Otherwise, "interrupt-controller@b7000000: False schema does not allow"
will be reported by arm,gic-v3.yaml.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
arch/arm64/boot/dts/hisilicon/hip05.dtsi | 8 ++++----
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 2 +-
arch/arm64/boot/dts/hisilicon/hip07.dtsi | 16 ++++++++--------
3 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
index bc49955360db754..f7e3a7af4634233 100644
--- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
@@ -242,28 +242,28 @@
<0x0 0xfe020000 0 0x10000>; /* GICV */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
- its_peri: interrupt-controller@8c000000 {
+ its_peri: msi-controller@8c000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
reg = <0x0 0x8c000000 0x0 0x40000>;
};
- its_m3: interrupt-controller@a3000000 {
+ its_m3: msi-controller@a3000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
reg = <0x0 0xa3000000 0x0 0x40000>;
};
- its_pcie: interrupt-controller@b7000000 {
+ its_pcie: msi-controller@b7000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
reg = <0x0 0xb7000000 0x0 0x40000>;
};
- its_dsa: interrupt-controller@c6000000 {
+ its_dsa: msi-controller@c6000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index 50ceaa959bdc016..a2fba458e047fd7 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -242,7 +242,7 @@
<0x0 0xfe020000 0 0x10000>; /* GICV */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
- its_dsa: interrupt-controller@c6000000 {
+ its_dsa: msi-controller@c6000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index 4773a533fce589d..892691bb2adb446 100644
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -924,56 +924,56 @@
<0x0 0xfe020000 0x0 0x10000>; /* GICV */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
- p0_its_peri_a: interrupt-controller@4c000000 {
+ p0_its_peri_a: msi-controller@4c000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
reg = <0x0 0x4c000000 0x0 0x40000>;
};
- p0_its_peri_b: interrupt-controller@6c000000 {
+ p0_its_peri_b: msi-controller@6c000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
reg = <0x0 0x6c000000 0x0 0x40000>;
};
- p0_its_dsa_a: interrupt-controller@c6000000 {
+ p0_its_dsa_a: msi-controller@c6000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
reg = <0x0 0xc6000000 0x0 0x40000>;
};
- p0_its_dsa_b: interrupt-controller@8,c6000000 {
+ p0_its_dsa_b: msi-controller@8c6000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
reg = <0x8 0xc6000000 0x0 0x40000>;
};
- p1_its_peri_a: interrupt-controller@400,4c000000 {
+ p1_its_peri_a: msi-controller@4004c000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
reg = <0x400 0x4c000000 0x0 0x40000>;
};
- p1_its_peri_b: interrupt-controller@400,6c000000 {
+ p1_its_peri_b: msi-controller@4006c000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
reg = <0x400 0x6c000000 0x0 0x40000>;
};
- p1_its_dsa_a: interrupt-controller@400,c6000000 {
+ p1_its_dsa_a: msi-controller@400c6000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
reg = <0x400 0xc6000000 0x0 0x40000>;
};
- p1_its_dsa_b: interrupt-controller@408,c6000000 {
+ p1_its_dsa_b: msi-controller@408c6000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
--
1.8.3
next prev parent reply other threads:[~2020-10-12 13:20 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-12 13:17 [PATCH 00/11] clean up some Hisilicon-related errors detected by DT schema on arm64 Zhen Lei
2020-10-12 13:17 ` Zhen Lei [this message]
2020-10-12 13:17 ` [PATCH 02/11] arm64: dts: hisilicon: separate each group of data in the property "reg" Zhen Lei
2020-10-12 13:17 ` [PATCH 03/11] arm64: dts: hisilicon: write the values of property-units into a uint32 array Zhen Lei
2020-10-12 13:17 ` [PATCH 04/11] arm64: dts: hisilicon: remove unused property pinctrl-names Zhen Lei
2020-10-12 13:17 ` [PATCH 05/11] arm64: dts: hisilicon: place clock-names "biu" before "ciu" Zhen Lei
2020-10-12 13:17 ` [PATCH 06/11] arm64: dts: hisilicon: normalize the node name of the SMMU devices Zhen Lei
2020-10-12 13:17 ` [PATCH 07/11] arm64: dts: hisilicon: normalize the node name of the usb devices Zhen Lei
2020-10-12 13:17 ` [PATCH 08/11] arm64: dts: hisilicon: normalize the node name of the UART devices Zhen Lei
2020-10-12 13:17 ` [PATCH 09/11] arm64: dts: hisilicon: list all clocks required by spi-pl022.yaml Zhen Lei
2020-10-12 13:17 ` [PATCH 10/11] arm64: dts: hisilicon: list all clocks required by pl011.yaml Zhen Lei
2020-10-12 13:17 ` [PATCH 11/11] arm64: dts: hisilicon: list all clocks required by snps-dw-apb-uart.yaml Zhen Lei
2020-11-25 2:21 ` [PATCH 00/11] clean up some Hisilicon-related errors detected by DT schema on arm64 Wei Xu
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