[17/18] media: hantro: add dump registers debug option before decode start
diff mbox series

Message ID 20201012205957.889185-18-adrian.ratiu@collabora.com
State New, archived
Headers show
Series
  • Add Hantro regmap and VC8000 h264 decode support
Related show

Commit Message

Adrian Ratiu Oct. 12, 2020, 8:59 p.m. UTC
It is very useful to know the status of all the decoder configuration
registers right before starting a decode operation, so add an option
to print them if register debugging is enabled (debug bit 7 is set).

Signed-off-by: Adrian Ratiu <adrian.ratiu@collabora.com>
---
 drivers/staging/media/hantro/hantro.h          | 1 +
 drivers/staging/media/hantro/hantro_h264_dec.c | 9 ++++++++-
 2 files changed, 9 insertions(+), 1 deletion(-)

Patch
diff mbox series

diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h
index 70aeb11b1149..1b0c441ff15a 100644
--- a/drivers/staging/media/hantro/hantro.h
+++ b/drivers/staging/media/hantro/hantro.h
@@ -304,6 +304,7 @@  struct hantro_reg {
  * bit 4 - detail fmt, ctrl, buffer q/dq information
  * bit 5 - detail function enter/leave trace information
  * bit 6 - register write/read information
+ * bit 7 - dump
  */
 extern int hantro_debug;
 
diff --git a/drivers/staging/media/hantro/hantro_h264_dec.c b/drivers/staging/media/hantro/hantro_h264_dec.c
index e64b59c84111..2c53394cbb0c 100644
--- a/drivers/staging/media/hantro/hantro_h264_dec.c
+++ b/drivers/staging/media/hantro/hantro_h264_dec.c
@@ -381,7 +381,9 @@  void hantro_g1_h264_dec_run(struct hantro_ctx *ctx)
 	struct hantro_dev *vpu = ctx->dev;
 	struct hantro_regmap_fields_dec *fields = vpu->reg_fields_dec;
 	bool do_high10 = (vpu->h264_hw_mode == HANTRO_H264_HIGH10);
-	int reg;
+	u32 max_reg = hantro_regmap_dec.max_register;
+	u32 reg_stride = hantro_regmap_dec.reg_stride;
+	int reg, i;
 
 	/* Prepare the H264 decoder context. */
 	if (hantro_h264_dec_prepare_run(ctx))
@@ -421,6 +423,11 @@  void hantro_g1_h264_dec_run(struct hantro_ctx *ctx)
 	regmap_field_write(fields->dec_max_burst, 16);
 	regmap_field_write(fields->dec_axi_rd_id, 16);
 
+	vpu_debug(7, "Reg dump at decoding start\n");
+	for (i = 0; hantro_debug & BIT(7) && i <= max_reg; i += reg_stride)
+		vpu_debug(7, "swreg %03d: %08x\n", i / 4, vdpu_read(vpu, i));
+	vpu_debug(7, "Reg dump end\n");
+
 	/* Start decoding! */
 	vdpu_write(vpu, G1_REG_INTERRUPT_DEC_E, G1_REG_INTERRUPT);
 }