From: kan.liang@linux.intel.com
To: peterz@infradead.org, mingo@redhat.com, linux-kernel@vger.kernel.org
Cc: ak@linux.intel.com, Kan Liang <kan.liang@linux.intel.com>
Subject: [PATCH 1/4] perf/x86/intel: Add Rocket Lake CPU support
Date: Mon, 19 Oct 2020 08:35:25 -0700 [thread overview]
Message-ID: <20201019153528.13850-1-kan.liang@linux.intel.com> (raw)
From: Kan Liang <kan.liang@linux.intel.com>
From the perspective of Intel PMU, Rocket Lake is the same as Ice Lake
and Tiger Lake. Share the perf code with them.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
---
arch/x86/events/intel/core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index bdf28d2f27e8..4def6fa63875 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -5425,6 +5425,7 @@ __init int intel_pmu_init(void)
case INTEL_FAM6_ICELAKE:
case INTEL_FAM6_TIGERLAKE_L:
case INTEL_FAM6_TIGERLAKE:
+ case INTEL_FAM6_ROCKETLAKE:
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));
--
2.25.1
next reply other threads:[~2020-10-19 15:36 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-19 15:35 kan.liang [this message]
2020-10-19 15:35 ` [PATCH 2/4] perf/x86/cstate: Add Rocket Lake CPU support kan.liang
2020-10-29 10:51 ` [tip: perf/core] " tip-bot2 for Kan Liang
2020-10-19 15:35 ` [PATCH 3/4] perf/x86/msr: " kan.liang
2020-10-29 10:51 ` [tip: perf/core] " tip-bot2 for Kan Liang
2020-10-19 15:35 ` [PATCH 4/4] perf/x86/intel/uncore: Add Rocket Lake support kan.liang
2020-10-29 10:51 ` [tip: perf/core] " tip-bot2 for Kan Liang
2020-10-29 10:51 ` [tip: perf/core] perf/x86/intel: Add Rocket Lake CPU support tip-bot2 for Kan Liang
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