[1/5] arm64: dts: imx8mn: Enable Asynchronous Sample Rate Converter
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Message ID 20201019174529.289499-1-aford173@gmail.com
State New, archived
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  • [1/5] arm64: dts: imx8mn: Enable Asynchronous Sample Rate Converter
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Commit Message

Adam Ford Oct. 19, 2020, 5:45 p.m. UTC
The driver exists for the Enhanced Asynchronous Sample Rate Converter
(EASRC) Controller, but there isn't a device tree entry for it.

On the vendor kernel, they put this on a spba-bus for SDMA support.

Add the the node for the spba-bus with the easrc node inside.

Signed-off-by: Adam Ford <aford173@gmail.com>

Comments

Shawn Guo Nov. 1, 2020, 2:03 a.m. UTC | #1
On Mon, Oct 19, 2020 at 12:45:24PM -0500, Adam Ford wrote:
> The driver exists for the Enhanced Asynchronous Sample Rate Converter
> (EASRC) Controller, but there isn't a device tree entry for it.
> 
> On the vendor kernel, they put this on a spba-bus for SDMA support.
> 
> Add the the node for the spba-bus with the easrc node inside.
> 
> Signed-off-by: Adam Ford <aford173@gmail.com>
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> index 746faf1cf2fb..7d34281332e1 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> @@ -246,6 +246,34 @@ aips1: bus@30000000 {
>  			#size-cells = <1>;
>  			ranges;
>  
> +			spba-bus@30000000 {

spba: bus@30000000

> +				compatible = "fsl,spba-bus", "simple-bus";

"fsl,spba-bus" is undocumented.  Document it or drop it.

> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +				reg = <0x30000000 0x100000>;
> +				ranges;
> +
> +				easrc: easrc@300C0000 {
> +					compatible = "fsl,imx8mn-easrc";
> +					reg = <0x300C0000 0x10000>;
> +					interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
> +					clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
> +					clock-names = "mem";
> +					dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
> +					       <&sdma2 18 23 0> , <&sdma2 19 23 0>,
> +					       <&sdma2 20 23 0> , <&sdma2 21 23 0>,
> +					       <&sdma2 22 23 0> , <&sdma2 23 23 0>;
> +					dma-names = "ctx0_rx", "ctx0_tx",
> +						    "ctx1_rx", "ctx1_tx",
> +						    "ctx2_rx", "ctx2_tx",
> +						    "ctx3_rx", "ctx3_tx";
> +					fsl,easrc-ram-script-name = "imx/easrc/easrc-imx8mn.bin";

Undocumented property?

Shawn

> +					fsl,asrc-rate  = <8000>;
> +					fsl,asrc-width = <16>;
> +					status = "disabled";
> +				};
> +			};
> +
>  			gpio1: gpio@30200000 {
>  				compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio";
>  				reg = <0x30200000 0x10000>;
> -- 
> 2.25.1
>
Adam Ford Nov. 1, 2020, 1:18 p.m. UTC | #2
On Sat, Oct 31, 2020 at 9:03 PM Shawn Guo <shawnguo@kernel.org> wrote:
>
> On Mon, Oct 19, 2020 at 12:45:24PM -0500, Adam Ford wrote:
> > The driver exists for the Enhanced Asynchronous Sample Rate Converter
> > (EASRC) Controller, but there isn't a device tree entry for it.
> >
> > On the vendor kernel, they put this on a spba-bus for SDMA support.
> >
> > Add the the node for the spba-bus with the easrc node inside.
> >
> > Signed-off-by: Adam Ford <aford173@gmail.com>
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > index 746faf1cf2fb..7d34281332e1 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > @@ -246,6 +246,34 @@ aips1: bus@30000000 {
> >                       #size-cells = <1>;
> >                       ranges;
> >
> > +                     spba-bus@30000000 {
>
> spba: bus@30000000

Go ahead and disregard my V2.  I'll submit a V3.  I sent the V2 before
I got this feedback.

>
> > +                             compatible = "fsl,spba-bus", "simple-bus";
>
> "fsl,spba-bus" is undocumented.  Document it or drop it.

I just submitted a patch to document this bus.  It's used on a bunch
of imx boards, so I think it's important to document it.
I assigned you as the maintainer of the binding doc since you're
listed as the maintainer of the SDMA driver which is what's using
the compatible flag.  I hope that is the correct thing to do.

>
> > +                             #address-cells = <1>;
> > +                             #size-cells = <1>;
> > +                             reg = <0x30000000 0x100000>;
> > +                             ranges;
> > +
> > +                             easrc: easrc@300C0000 {
> > +                                     compatible = "fsl,imx8mn-easrc";
> > +                                     reg = <0x300C0000 0x10000>;
> > +                                     interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
> > +                                     clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
> > +                                     clock-names = "mem";
> > +                                     dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
> > +                                            <&sdma2 18 23 0> , <&sdma2 19 23 0>,
> > +                                            <&sdma2 20 23 0> , <&sdma2 21 23 0>,
> > +                                            <&sdma2 22 23 0> , <&sdma2 23 23 0>;
> > +                                     dma-names = "ctx0_rx", "ctx0_tx",
> > +                                                 "ctx1_rx", "ctx1_tx",
> > +                                                 "ctx2_rx", "ctx2_tx",
> > +                                                 "ctx3_rx", "ctx3_tx";
> > +                                     fsl,easrc-ram-script-name = "imx/easrc/easrc-imx8mn.bin";
>
> Undocumented property?

That's my fault.  I accidentally copied the device tree entry from the
vendor kernel instead of using the naming from the device tree binding
document.
I fixed this in my V2, but I need to send a V3 anyway.

adam

>
> Shawn
>
> > +                                     fsl,asrc-rate  = <8000>;
> > +                                     fsl,asrc-width = <16>;
> > +                                     status = "disabled";
> > +                             };
> > +                     };
> > +
> >                       gpio1: gpio@30200000 {
> >                               compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio";
> >                               reg = <0x30200000 0x10000>;
> > --
> > 2.25.1
> >

Patch
diff mbox series

diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 746faf1cf2fb..7d34281332e1 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -246,6 +246,34 @@  aips1: bus@30000000 {
 			#size-cells = <1>;
 			ranges;
 
+			spba-bus@30000000 {
+				compatible = "fsl,spba-bus", "simple-bus";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0x30000000 0x100000>;
+				ranges;
+
+				easrc: easrc@300C0000 {
+					compatible = "fsl,imx8mn-easrc";
+					reg = <0x300C0000 0x10000>;
+					interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
+					clock-names = "mem";
+					dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
+					       <&sdma2 18 23 0> , <&sdma2 19 23 0>,
+					       <&sdma2 20 23 0> , <&sdma2 21 23 0>,
+					       <&sdma2 22 23 0> , <&sdma2 23 23 0>;
+					dma-names = "ctx0_rx", "ctx0_tx",
+						    "ctx1_rx", "ctx1_tx",
+						    "ctx2_rx", "ctx2_tx",
+						    "ctx3_rx", "ctx3_tx";
+					fsl,easrc-ram-script-name = "imx/easrc/easrc-imx8mn.bin";
+					fsl,asrc-rate  = <8000>;
+					fsl,asrc-width = <16>;
+					status = "disabled";
+				};
+			};
+
 			gpio1: gpio@30200000 {
 				compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio";
 				reg = <0x30200000 0x10000>;