From: "Ramuthevar,Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com>
To: vigneshr@ti.com, tudor.ambarus@microchip.com, broonie@kernel.org,
linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
robh+dt@kernel.org
Cc: devicetree@vger.kernel.org, miquel.raynal@bootlin.com,
simon.k.r.goldschmidt@gmail.com, dinguyen@kernel.org,
richard@nod.at, cheol.yong.kim@intel.com, qi-ming.wu@intel.com,
Ramuthevar Vadivel Murugan
<vadivel.muruganx.ramuthevar@linux.intel.com>
Subject: [PATCH v2 5/6] dt-bindings: spi: Add compatible for Intel LGM SoC
Date: Wed, 21 Oct 2020 10:36:14 +0800 [thread overview]
Message-ID: <20201021023615.48982-6-vadivel.muruganx.ramuthevar@linux.intel.com> (raw)
In-Reply-To: <20201021023615.48982-1-vadivel.muruganx.ramuthevar@linux.intel.com>
From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Add compatible string for Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
---
.../devicetree/bindings/spi/cadence-quadspi.yaml | 68 +++++++++++-----------
1 file changed, 34 insertions(+), 34 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
index 6ed8122a1326..57be1a730e7b 100644
--- a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
+++ b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
@@ -14,65 +14,61 @@ allOf:
properties:
compatible:
- items:
- - const: cdns,qspi-nor
- - const: ti,k2g-qspi, cdns,qspi-nor
- - const: ti,am654-ospi, cdns,qspi-nor
-
- description:
- Should be one of the above supported compatible strings.
- optional properties
- "cdns,is-decoded-cs" - Flag to indicate whether decoder is used or not.
- "cdns,rclk-en" - Flag to indicate that QSPI return clock is used to latch
- the read data rather than the QSPI clock. Make sure that QSPI return
- clock is populated on the board before using this property.
+ oneOf:
+ - items:
+ - const: cdns,qspi-nor
+ - const: ti,k2g-qspi, cdns,qspi-nor
+ - const: ti,am654-ospi, cdns,qspi-nor
reg:
- maxItems: 2
-
- description:
- Contains two entries, each of which is a tuple consisting of a
- physical address and length. The first entry is the address and
- length of the controller register set. The second entry is the
- address and length of the QSPI Controller data area.
+ items:
+ - description: the controller register set
+ - description: the controller data area
interrupts:
maxItems: 1
- description:
- Unit interrupt specifier for the controller interrupt.
clocks:
maxItems: 1
- description:
- phandle to the Quad SPI clock.
cdns,fifo-depth:
description:
Size of the data FIFO in words.
- allOf:
- - $ref: "/schemas/types.yaml#/definitions/uint32"
- - enum: [ 128, 256 ]
- - default: 128
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+ enum: [ 128, 256 ]
+ default: 128
cdns,fifo-width:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Bus width of the data FIFO in bytes.
- multipleOf: 4
+ default: 4
cdns,trigger-address:
$ref: /schemas/types.yaml#/definitions/uint32
description:
32-bit indirect AHB trigger address.
+ cdns,is-decoded-cs:
+ type: boolean
+ description:
+ Flag to indicate whether decoder is used or not.
+
+ cdns,rclk-en:
+ type: boolean
+ description:
+ Flag to indicate that QSPI return clock is used to latch the read
+ data rather than the QSPI clock. Make sure that QSPI return clock
+ is populated on the board before using this property.
+
resets:
- description:
- Must contain an entry for each entry in reset-names.
- See ../reset/reset.txt for details.
+ maxItems : 2
reset-names:
- description:
- Must include either "qspi" and/or "qspi-ocp".
+ minItems: 1
+ maxItems: 2
+ items:
+ enum: [ qspi, qspi-ocp ]
# subnode's properties
patternProperties:
@@ -114,13 +110,17 @@ required:
- cdns,fifo-depth
- cdns,fifo-width
- cdns,trigger-address
+ - cdns,is-decoded-cs
+ - cdns,rclk-en
- resets
- reset-names
+additionalProperties: false
+
examples:
- |
qspi: spi@ff705000 {
- compatible = "cadence,qspi";
+ compatible = "cadence,qspi","cdns,qpsi-nor";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xff705000 0x1000>,
--
2.11.0
next prev parent reply other threads:[~2020-10-21 2:37 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-21 2:36 [PATCH v2 0/6] spi: cadence-quadspi: Add QSPI controller support for Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-10-21 2:36 ` [PATCH v2 1/6] spi: cadence-quadspi: Disable the DAC " Ramuthevar,Vadivel MuruganX
2020-10-21 2:36 ` [PATCH v2 2/6] spi: cadence-quadspi: Add multi-chipselect support " Ramuthevar,Vadivel MuruganX
2020-10-21 2:36 ` [PATCH v2 3/6] spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi Ramuthevar,Vadivel MuruganX
2020-10-21 2:36 ` [PATCH v2 4/6] dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml Ramuthevar,Vadivel MuruganX
2020-10-21 2:36 ` Ramuthevar,Vadivel MuruganX [this message]
2020-10-21 2:36 ` [PATCH v2 6/6] dt-bindings: spi: Add compatible for Intel LGM SoC Ramuthevar,Vadivel MuruganX
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201021023615.48982-6-vadivel.muruganx.ramuthevar@linux.intel.com \
--to=vadivel.muruganx.ramuthevar@linux.intel.com \
--cc=broonie@kernel.org \
--cc=cheol.yong.kim@intel.com \
--cc=devicetree@vger.kernel.org \
--cc=dinguyen@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=miquel.raynal@bootlin.com \
--cc=qi-ming.wu@intel.com \
--cc=richard@nod.at \
--cc=robh+dt@kernel.org \
--cc=simon.k.r.goldschmidt@gmail.com \
--cc=tudor.ambarus@microchip.com \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).