From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
Stephen Boyd <sboyd@kernel.org>,
Nicolas Boichat <drinkcat@chromium.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>, <linux-clk@vger.kernel.org>,
<srv_heupstream@mediatek.com>, Weiyi Lu <weiyi.lu@mediatek.com>
Subject: [PATCH 10/12] clk: mediatek: Clean up the pll_en_bit from en_mask on MT8183
Date: Thu, 22 Oct 2020 20:56:03 +0800 [thread overview]
Message-ID: <1603371365-30863-11-git-send-email-weiyi.lu@mediatek.com> (raw)
In-Reply-To: <1603371365-30863-1-git-send-email-weiyi.lu@mediatek.com>
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
---
drivers/clk/mediatek/clk-mt8183.c | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt8183.c b/drivers/clk/mediatek/clk-mt8183.c
index 5046852..608108c 100644
--- a/drivers/clk/mediatek/clk-mt8183.c
+++ b/drivers/clk/mediatek/clk-mt8183.c
@@ -1121,34 +1121,34 @@
};
static const struct mtk_pll_data plls[] = {
- PLL_B(CLK_APMIXED_ARMPLL_LL, "armpll_ll", 0x0200, 0x020C, 0x00000001,
+ PLL_B(CLK_APMIXED_ARMPLL_LL, "armpll_ll", 0x0200, 0x020C, 0,
HAVE_RST_BAR | PLL_AO, BIT(24), 22, 8, 0x0204, 24, 0x0, 0x0, 0,
0x0204, 0, 0, armpll_div_table),
- PLL_B(CLK_APMIXED_ARMPLL_L, "armpll_l", 0x0210, 0x021C, 0x00000001,
+ PLL_B(CLK_APMIXED_ARMPLL_L, "armpll_l", 0x0210, 0x021C, 0,
HAVE_RST_BAR | PLL_AO, BIT(24), 22, 8, 0x0214, 24, 0x0, 0x0, 0,
0x0214, 0, 0, armpll_div_table),
- PLL(CLK_APMIXED_CCIPLL, "ccipll", 0x0290, 0x029C, 0x00000001,
+ PLL(CLK_APMIXED_CCIPLL, "ccipll", 0x0290, 0x029C, 0,
HAVE_RST_BAR | PLL_AO, BIT(24), 22, 8, 0x0294, 24, 0x0, 0x0, 0,
0x0294, 0, 0),
- PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x0220, 0x022C, 0x00000001,
+ PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x0220, 0x022C, 0,
HAVE_RST_BAR, BIT(24), 22, 8, 0x0224, 24, 0x0, 0x0, 0,
0x0224, 0, 0),
- PLL(CLK_APMIXED_UNIV2PLL, "univ2pll", 0x0230, 0x023C, 0x00000001,
+ PLL(CLK_APMIXED_UNIV2PLL, "univ2pll", 0x0230, 0x023C, 0,
HAVE_RST_BAR, BIT(24), 22, 8, 0x0234, 24, 0x0, 0x0, 0,
0x0234, 0, 0),
- PLL_B(CLK_APMIXED_MFGPLL, "mfgpll", 0x0240, 0x024C, 0x00000001,
+ PLL_B(CLK_APMIXED_MFGPLL, "mfgpll", 0x0240, 0x024C, 0,
0, 0, 22, 8, 0x0244, 24, 0x0, 0x0, 0, 0x0244, 0, 0,
mfgpll_div_table),
- PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0250, 0x025C, 0x00000001,
+ PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0250, 0x025C, 0,
0, 0, 22, 8, 0x0254, 24, 0x0, 0x0, 0, 0x0254, 0, 0),
- PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x0260, 0x026C, 0x00000001,
+ PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x0260, 0x026C, 0,
0, 0, 22, 8, 0x0264, 24, 0x0, 0x0, 0, 0x0264, 0, 0),
- PLL(CLK_APMIXED_MMPLL, "mmpll", 0x0270, 0x027C, 0x00000001,
+ PLL(CLK_APMIXED_MMPLL, "mmpll", 0x0270, 0x027C, 0,
HAVE_RST_BAR, BIT(23), 22, 8, 0x0274, 24, 0x0, 0x0, 0,
0x0274, 0, 0),
- PLL(CLK_APMIXED_APLL1, "apll1", 0x02A0, 0x02B0, 0x00000001,
+ PLL(CLK_APMIXED_APLL1, "apll1", 0x02A0, 0x02B0, 0,
0, 0, 32, 8, 0x02A0, 1, 0x02A8, 0x0014, 0, 0x02A4, 0, 0x02A0),
- PLL(CLK_APMIXED_APLL2, "apll2", 0x02b4, 0x02c4, 0x00000001,
+ PLL(CLK_APMIXED_APLL2, "apll2", 0x02b4, 0x02c4, 0,
0, 0, 32, 8, 0x02B4, 1, 0x02BC, 0x0014, 1, 0x02B8, 0, 0x02B4),
};
--
1.8.1.1.dirty
next prev parent reply other threads:[~2020-10-22 12:56 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-22 12:55 [PATCH 00/12] Clean up the pll_en_bit from en_mask on all the MediaTek clock drivers Weiyi Lu
2020-10-22 12:55 ` [PATCH 01/12] clk: mediatek: Clean up the pll_en_bit from en_mask on MT2701 Weiyi Lu
2020-10-22 12:55 ` [PATCH 02/12] clk: mediatek: Clean up the pll_en_bit from en_mask on MT2712 Weiyi Lu
2020-10-22 12:55 ` [PATCH 03/12] clk: mediatek: Clean up the pll_en_bit from en_mask on MT6765 Weiyi Lu
2020-10-22 12:55 ` [PATCH 04/12] clk: mediatek: Clean up the pll_en_bit from en_mask on MT6779 Weiyi Lu
2020-10-22 12:55 ` [PATCH 05/12] clk: mediatek: Clean up the pll_en_bit from en_mask on MT6797 Weiyi Lu
2020-10-22 12:55 ` [PATCH 06/12] clk: mediatek: Clean up the pll_en_bit from en_mask on MT7622 Weiyi Lu
2020-10-22 12:56 ` [PATCH 07/12] clk: mediatek: Clean up the pll_en_bit from en_mask on MT7629 Weiyi Lu
2020-10-22 12:56 ` [PATCH 08/12] clk: mediatek: Clean up the pll_en_bit from en_mask on MT8135 Weiyi Lu
2020-10-22 12:56 ` [PATCH 09/12] clk: mediatek: Clean up the pll_en_bit from en_mask on MT8173 Weiyi Lu
2020-10-22 12:56 ` Weiyi Lu [this message]
2020-10-28 10:27 ` [PATCH 10/12] clk: mediatek: Clean up the pll_en_bit from en_mask on MT8183 Fabien Parent
2020-11-09 2:22 ` Weiyi Lu
2020-10-22 12:56 ` [PATCH 11/12] clk: mediatek: Clean up the pll_en_bit from en_mask on MT8516 Weiyi Lu
2020-10-22 12:56 ` [PATCH 12/12] clk: mediatek: limit en_mask to a pure div_en_mask Weiyi Lu
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