From: Hector Yuan <hector.yuan@mediatek.com>
To: <linux-mediatek@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-pm@vger.kernel.org>, Rob Herring <robh+dt@kernel.org>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Viresh Kumar <viresh.kumar@linaro.org>,
Maxime Ripard <mripard@kernel.org>,
Santosh Shilimkar <ssantosh@kernel.org>,
Amit Kucheria <amit.kucheria@linaro.org>,
Stephen Boyd <sboyd@kernel.org>,
Ulf Hansson <ulf.hansson@linaro.org>,
Dave Gerlach <d-gerlach@ti.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Robin Murphy <robin.murphy@arm.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
<devicetree@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <wsd_upstream@mediatek.com>,
<hector.yuan@mediatek.com>
Subject: [PATCH v1 3/6] dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW
Date: Fri, 23 Oct 2020 16:24:50 +0800 [thread overview]
Message-ID: <1603441493-18554-4-git-send-email-hector.yuan@mediatek.com> (raw)
In-Reply-To: <1603441493-18554-1-git-send-email-hector.yuan@mediatek.com>
From: "Hector.Yuan" <hector.yuan@mediatek.com>
Add devicetree bindings for MediaTek HW driver.
Signed-off-by: Hector.Yuan <hector.yuan@mediatek.com>
---
.../bindings/cpufreq/cpufreq-mediatek-hw.yaml | 46 ++++++++++++++++++++
1 file changed, 46 insertions(+)
create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
new file mode 100644
index 0000000..a99f44f
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/cpufreq/cpufreq-mediatek-hw.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek's CPUFREQ Bindings
+
+maintainers:
+ - Hector Yuan <hector.yuan@mediatek.com>
+
+description:
+ CPUFREQ HW is a hardware engine used by MediaTek
+ SoCs to manage frequency in hardware. It is capable of controlling frequency
+ for multiple clusters.
+
+properties:
+ compatible:
+ const: mediatek,cpufreq-hw
+
+ reg:
+ minItems: 1
+ maxItems: 2
+ description: |
+ Addresses and sizes for the memory of the HW bases in each frequency domain.
+
+required:
+ - compatible
+ - reg
+
+examples:
+ - |
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpufreq_hw: cpufreq@11bc00 {
+ compatible = "mediatek,cpufreq-hw";
+ reg = <0 0x11bc10 0 0x8c>,
+ <0 0x11bca0 0 0x8c>;
+ };
+ };
+
+
+
+
--
1.7.9.5
next prev parent reply other threads:[~2020-10-23 8:25 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-23 8:24 [PATCH v1] cpufreq: mediatek-hw: Add support for Mediatek cpufreq HW driver Hector Yuan
2020-10-23 8:24 ` [PATCH v1 1/6] cpufreq: mediatek-hw: Add support for CPUFREQ HW Hector Yuan
2020-10-23 8:24 ` [PATCH v1 2/6] dt-bindings: arm: cpus: Document 'mtk,freq-domain' property Hector Yuan
2020-10-23 8:29 ` Viresh Kumar
2020-10-26 6:14 ` Hector Yuan
2020-10-23 16:20 ` Rob Herring
2020-10-26 6:12 ` Hector Yuan
2020-10-23 8:24 ` Hector Yuan [this message]
2020-10-23 8:35 ` [PATCH v1 3/6] dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW Viresh Kumar
2020-10-26 6:17 ` Hector Yuan
2020-10-23 16:15 ` Rob Herring
2020-10-26 6:15 ` Hector Yuan
2020-10-23 8:24 ` [PATCH v1 4/6] cpufreq: mediatek-hw: register EM power table Hector Yuan
2020-10-23 8:24 ` [PATCH v1 5/6] cpufreq: mediatek-hw: Add SVS CPU initialization Hector Yuan
2020-10-23 8:37 ` Viresh Kumar
2020-10-23 8:24 ` [PATCH v1 6/6] cpufreq: mediatek-hw: Add cooling dev flag Hector Yuan
2020-10-23 8:28 ` [PATCH v1] cpufreq: mediatek-hw: Add support for Mediatek cpufreq HW driver Viresh Kumar
2020-10-23 9:08 ` Hector Yuan
2020-10-23 9:27 ` Viresh Kumar
2020-10-26 6:20 ` Hector Yuan
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