From: guoren@kernel.org
To: palmerdabbelt@google.com, paul.walmsley@sifive.com,
anup@brainfault.org, greentime.hu@sifive.com, zong.li@sifive.com,
atish.patra@wdc.com, tglx@linutronix.de, jason@lakedaemon.net,
maz@kernel.org, wesley@sifive.com, yash.shah@sifive.com,
hch@lst.de
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
guoren@kernel.org, Guo Ren <guoren@linux.alibaba.com>
Subject: [PATCH 2/3] irqchip/irq-sifive-plic: Fixup couldn't broadcast to multi CPUs
Date: Fri, 23 Oct 2020 10:17:24 +0000 [thread overview]
Message-ID: <1603448245-79429-2-git-send-email-guoren@kernel.org> (raw)
In-Reply-To: <1603448245-79429-1-git-send-email-guoren@kernel.org>
From: Guo Ren <guoren@linux.alibaba.com>
If "echo 3 > /proc/irq/1/smp_affinity", we want irq 1 could be
broadcast to CPU0 & CPU1 and one of them would pick up the irq
handler.
But current implementation couldn't let multi CPUs process the
same IRQ concurrent.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
---
drivers/irqchip/irq-sifive-plic.c | 23 ++++++-----------------
1 file changed, 6 insertions(+), 17 deletions(-)
diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index 2e56576..0003322 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -114,15 +114,12 @@ static inline void plic_irq_toggle(const struct cpumask *mask,
static void plic_irq_unmask(struct irq_data *d)
{
struct cpumask amask;
- unsigned int cpu;
struct plic_priv *priv = irq_get_chip_data(d->irq);
cpumask_and(&amask, &priv->lmask, cpu_online_mask);
- cpu = cpumask_any_and(irq_data_get_affinity_mask(d),
- &amask);
- if (WARN_ON_ONCE(cpu >= nr_cpu_ids))
- return;
- plic_irq_toggle(cpumask_of(cpu), d, 1);
+ cpumask_and(&amask, &amask, irq_data_get_affinity_mask(d));
+
+ plic_irq_toggle(&amask, d, 1);
}
static void plic_irq_mask(struct irq_data *d)
@@ -136,24 +133,16 @@ static void plic_irq_mask(struct irq_data *d)
static int plic_set_affinity(struct irq_data *d,
const struct cpumask *mask_val, bool force)
{
- unsigned int cpu;
struct cpumask amask;
struct plic_priv *priv = irq_get_chip_data(d->irq);
cpumask_and(&amask, &priv->lmask, mask_val);
+ cpumask_and(&amask, &amask, cpu_online_mask);
- if (force)
- cpu = cpumask_first(&amask);
- else
- cpu = cpumask_any_and(&amask, cpu_online_mask);
-
- if (cpu >= nr_cpu_ids)
- return -EINVAL;
+ irq_data_update_effective_affinity(d, &amask);
plic_irq_toggle(&priv->lmask, d, 0);
- plic_irq_toggle(cpumask_of(cpu), d, 1);
-
- irq_data_update_effective_affinity(d, cpumask_of(cpu));
+ plic_irq_toggle(&amask, d, 1);
return IRQ_SET_MASK_OK_DONE;
}
--
2.7.4
next prev parent reply other threads:[~2020-10-23 10:18 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-23 10:17 [PATCH 1/3] irqchip/irq-sifive-plic: Fixup wrong size of xxx_PER_HART and reg base guoren
2020-10-23 10:17 ` guoren [this message]
2020-10-23 11:27 ` [PATCH 2/3] irqchip/irq-sifive-plic: Fixup couldn't broadcast to multi CPUs Anup Patel
2020-10-24 3:38 ` Guo Ren
2020-10-23 10:17 ` [PATCH 3/3] irqchip/irq-sifive-plic: Fixup set_affinity enable irq unexpected guoren
2020-10-23 11:33 ` Anup Patel
2020-10-23 11:42 ` [PATCH 1/3] irqchip/irq-sifive-plic: Fixup wrong size of xxx_PER_HART and reg base Anup Patel
2020-10-24 3:09 ` Guo Ren
2020-10-25 9:17 ` Anup Patel
2020-10-26 15:01 ` Guo Ren
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