From: Vidya Sagar <vidyas@nvidia.com>
To: <jingoohan1@gmail.com>, <gustavo.pimentel@synopsys.com>,
<lorenzo.pieralisi@arm.com>, <bhelgaas@google.com>,
<amurray@thegoodpenguin.co.uk>, <robh@kernel.org>,
<treding@nvidia.com>, <jonathanh@nvidia.com>
Cc: <linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<kthota@nvidia.com>, <mmaddireddy@nvidia.com>,
<vidyas@nvidia.com>, <sagar.tv@gmail.com>
Subject: [PATCH V3 1/2] PCI/AER: Add pcie_is_ecrc_enabled() API
Date: Thu, 29 Oct 2020 11:09:58 +0530 [thread overview]
Message-ID: <20201029053959.31361-2-vidyas@nvidia.com> (raw)
In-Reply-To: <20201029053959.31361-1-vidyas@nvidia.com>
Adds pcie_is_ecrc_enabled() API to let other sub-systems (like DesignWare)
to query if ECRC policy is enabled and perform any configuration
required in those respective sub-systems.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-by: Jingoo Han <jingoohan1@gmail.com>
---
V3:
* Address Ethan Zhao's comments
* Added 'Reviewed-by: Jingoo Han <jingoohan1@gmail.com>'
V2:
* None from V1
drivers/pci/pci.h | 2 ++
drivers/pci/pcie/aer.c | 11 +++++++++++
2 files changed, 13 insertions(+)
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index fa12f7cbc1a0..325fdbf91dde 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -575,9 +575,11 @@ static inline void pcie_aspm_powersave_config_link(struct pci_dev *pdev) { }
#ifdef CONFIG_PCIE_ECRC
void pcie_set_ecrc_checking(struct pci_dev *dev);
void pcie_ecrc_get_policy(char *str);
+bool pcie_is_ecrc_enabled(void);
#else
static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { }
static inline void pcie_ecrc_get_policy(char *str) { }
+static inline bool pcie_is_ecrc_enabled(void) { return false; }
#endif
#ifdef CONFIG_PCIE_PTM
diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
index 65dff5f3457a..d0f5a7043aff 100644
--- a/drivers/pci/pcie/aer.c
+++ b/drivers/pci/pcie/aer.c
@@ -207,6 +207,17 @@ void pcie_ecrc_get_policy(char *str)
ecrc_policy = i;
}
+
+/**
+ * pcie_is_ecrc_enabled - returns if ECRC is enabled in the system or not
+ *
+ * Returns true if ECRC policy is enabled and false otherwise
+ */
+bool pcie_is_ecrc_enabled(void)
+{
+ return ecrc_policy == ECRC_POLICY_ON;
+}
+EXPORT_SYMBOL(pcie_is_ecrc_enabled);
#endif /* CONFIG_PCIE_ECRC */
#define PCI_EXP_AER_FLAGS (PCI_EXP_DEVCTL_CERE | PCI_EXP_DEVCTL_NFERE | \
--
2.17.1
next prev parent reply other threads:[~2020-10-29 7:50 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-29 5:39 [PATCH V3 0/2] Add support to configure DWC for ECRC Vidya Sagar
2020-10-29 5:39 ` Vidya Sagar [this message]
2020-10-29 5:39 ` [PATCH V3 2/2] PCI: dwc: Add support to configure " Vidya Sagar
2020-10-29 22:03 ` Jingoo Han
2020-10-30 6:45 ` Vidya Sagar
2020-11-02 14:15 ` Rob Herring
2020-11-02 14:27 ` Vidya Sagar
2020-11-02 15:11 ` Gustavo Pimentel
2020-11-02 21:16 ` Rob Herring
2020-11-02 22:38 ` Gustavo Pimentel
2020-11-03 19:48 ` Rob Herring
2020-11-02 23:02 ` Bjorn Helgaas
2020-11-03 3:27 ` Vidya Sagar
2020-11-03 21:07 ` Bjorn Helgaas
2020-11-04 11:43 ` Vidya Sagar
2020-11-04 16:22 ` Bjorn Helgaas
2020-11-04 17:40 ` Vidya Sagar
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