From: Kishon Vijay Abraham I <kishon@ti.com>
To: Lee Jones <lee.jones@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Tero Kristo <t-kristo@ti.com>, Nishanth Menon <nm@ti.com>
Cc: Roger Quadros <rogerq@ti.com>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH 6/8] arm64: dts: ti: k3-j7200-common-proc-board: Enable SERDES0
Date: Mon, 2 Nov 2020 15:41:52 +0530 [thread overview]
Message-ID: <20201102101154.13598-7-kishon@ti.com> (raw)
In-Reply-To: <20201102101154.13598-1-kishon@ti.com>
Add sub-nodes to SERDES0 DT node to represent SERDES0 is connected
to PCIe and QSGMII (multi-link SERDES).
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
.../dts/ti/k3-j7200-common-proc-board.dts | 23 +++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index ef03e7636b66..65a2e5aeb050 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -8,6 +8,7 @@
#include "k3-j7200-som-p0.dtsi"
#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/mux/ti-serdes.h>
+#include <dt-bindings/phy/phy.h>
/ {
chosen {
@@ -213,3 +214,25 @@
dr_mode = "otg";
maximum-speed = "high-speed";
};
+
+&serdes_refclk {
+ clock-frequency = <100000000>;
+};
+
+&serdes0 {
+ serdes0_pcie_link: phy@0 {
+ reg = <0>;
+ cdns,num-lanes = <2>;
+ #phy-cells = <0>;
+ cdns,phy-type = <PHY_TYPE_PCIE>;
+ resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>;
+ };
+
+ serdes0_qsgmii_link: phy@1 {
+ reg = <2>;
+ cdns,num-lanes = <1>;
+ #phy-cells = <0>;
+ cdns,phy-type = <PHY_TYPE_QSGMII>;
+ resets = <&serdes_wiz0 3>;
+ };
+};
--
2.17.1
next prev parent reply other threads:[~2020-11-02 10:12 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-02 10:11 [PATCH 0/8] J7200: Add PCIe DT nodes to Enable PCIe Kishon Vijay Abraham I
2020-11-02 10:11 ` [PATCH 1/8] dt-bindings: mfd: ti,j721e-system-controller.yaml: Document "pcie-ctrl" Kishon Vijay Abraham I
2020-11-05 16:54 ` Rob Herring
2020-11-09 14:17 ` Kishon Vijay Abraham I
2020-11-02 10:11 ` [PATCH 2/8] dt-bindings: PCI: Add host mode dt-bindings for TI's J7200 SoC Kishon Vijay Abraham I
2020-11-05 16:56 ` Rob Herring
2020-11-02 10:11 ` [PATCH 3/8] dt-bindings: PCI: Add EP " Kishon Vijay Abraham I
2020-11-05 16:56 ` Rob Herring
2020-11-02 10:11 ` [PATCH 4/8] arm64: dts: ti: k3-j7200-main: Add DT for WIZ and SERDES Kishon Vijay Abraham I
2020-11-02 10:11 ` [PATCH 5/8] arm64: dts: ti: k3-j7200-main: Add PCIe device tree node Kishon Vijay Abraham I
2020-11-02 10:11 ` Kishon Vijay Abraham I [this message]
2020-11-02 10:11 ` [PATCH 7/8] arm64: dts: ti: k3-j7200-common-proc-board: Enable PCIe Kishon Vijay Abraham I
2020-11-02 10:11 ` [PATCH 8/8] arm64: dts: ti: k3-j721e-main: Fix PCIe maximum outbound regions Kishon Vijay Abraham I
2020-11-02 16:41 ` Nishanth Menon
2020-11-03 2:18 ` Kishon Vijay Abraham I
2020-11-05 16:53 ` Rob Herring
2020-11-06 15:10 ` Kishon Vijay Abraham I
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