From: Sumit Garg <sumit.garg@linaro.org>
To: maz@kernel.org, catalin.marinas@arm.com, will@kernel.org,
daniel.thompson@linaro.org
Cc: linux-arm-kernel@lists.infradead.org, tglx@linutronix.de,
jason@lakedaemon.net, linux@armlinux.org.uk,
tsbogend@alpha.franken.de, mpe@ellerman.id.au,
davem@davemloft.net, mingo@redhat.com, bp@alien8.de,
x86@kernel.org, mark.rutland@arm.com,
julien.thierry.kdev@gmail.com, dianders@chromium.org,
jason.wessel@windriver.com, msys.mizuma@gmail.com,
ito-yuichi@fujitsu.com, kgdb-bugreport@lists.sourceforge.net,
linux-kernel@vger.kernel.org, Sumit Garg <sumit.garg@linaro.org>
Subject: [PATCH v7 2/7] irqchip/gic-v3: Enable support for SGIs to act as NMIs
Date: Mon, 2 Nov 2020 17:14:42 +0530 [thread overview]
Message-ID: <1604317487-14543-3-git-send-email-sumit.garg@linaro.org> (raw)
In-Reply-To: <1604317487-14543-1-git-send-email-sumit.garg@linaro.org>
Add support to handle SGIs as pseudo NMIs. As SGIs or IPIs default to a
special flow handler: handle_percpu_devid_fasteoi_ipi(), so skip NMI
handler update in case of SGIs.
Also, enable NMI support prior to gic_smp_init() as allocation of SGIs
as IRQs/NMIs happen as part of this routine.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
---
drivers/irqchip/irq-gic-v3.c | 29 +++++++++++++++++++++--------
1 file changed, 21 insertions(+), 8 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 16fecc0..7010ae2 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -461,6 +461,7 @@ static u32 gic_get_ppi_index(struct irq_data *d)
static int gic_irq_nmi_setup(struct irq_data *d)
{
struct irq_desc *desc = irq_to_desc(d->irq);
+ u32 idx;
if (!gic_supports_nmi())
return -EINVAL;
@@ -478,16 +479,22 @@ static int gic_irq_nmi_setup(struct irq_data *d)
return -EINVAL;
/* desc lock should already be held */
- if (gic_irq_in_rdist(d)) {
- u32 idx = gic_get_ppi_index(d);
+ switch (get_intid_range(d)) {
+ case SGI_RANGE:
+ break;
+ case PPI_RANGE:
+ case EPPI_RANGE:
+ idx = gic_get_ppi_index(d);
/* Setting up PPI as NMI, only switch handler for first NMI */
if (!refcount_inc_not_zero(&ppi_nmi_refs[idx])) {
refcount_set(&ppi_nmi_refs[idx], 1);
desc->handle_irq = handle_percpu_devid_fasteoi_nmi;
}
- } else {
+ break;
+ default:
desc->handle_irq = handle_fasteoi_nmi;
+ break;
}
gic_irq_set_prio(d, GICD_INT_NMI_PRI);
@@ -498,6 +505,7 @@ static int gic_irq_nmi_setup(struct irq_data *d)
static void gic_irq_nmi_teardown(struct irq_data *d)
{
struct irq_desc *desc = irq_to_desc(d->irq);
+ u32 idx;
if (WARN_ON(!gic_supports_nmi()))
return;
@@ -515,14 +523,20 @@ static void gic_irq_nmi_teardown(struct irq_data *d)
return;
/* desc lock should already be held */
- if (gic_irq_in_rdist(d)) {
- u32 idx = gic_get_ppi_index(d);
+ switch (get_intid_range(d)) {
+ case SGI_RANGE:
+ break;
+ case PPI_RANGE:
+ case EPPI_RANGE:
+ idx = gic_get_ppi_index(d);
/* Tearing down NMI, only switch handler for last NMI */
if (refcount_dec_and_test(&ppi_nmi_refs[idx]))
desc->handle_irq = handle_percpu_devid_irq;
- } else {
+ break;
+ default:
desc->handle_irq = handle_fasteoi_irq;
+ break;
}
gic_irq_set_prio(d, GICD_INT_DEF_PRI);
@@ -1708,6 +1722,7 @@ static int __init gic_init_bases(void __iomem *dist_base,
gic_dist_init();
gic_cpu_init();
+ gic_enable_nmi_support();
gic_smp_init();
gic_cpu_pm_init();
@@ -1719,8 +1734,6 @@ static int __init gic_init_bases(void __iomem *dist_base,
gicv2m_init(handle, gic_data.domain);
}
- gic_enable_nmi_support();
-
return 0;
out_free:
--
2.7.4
next prev parent reply other threads:[~2020-11-02 11:47 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-02 11:44 [PATCH v7 0/7] arm64: Add framework to turn an IPI as NMI Sumit Garg
2020-11-02 11:44 ` [PATCH v7 1/7] arm64: Add framework to turn " Sumit Garg
2020-11-02 15:33 ` Masayoshi Mizuma
2020-11-04 12:48 ` Sumit Garg
2020-11-02 11:44 ` Sumit Garg [this message]
2020-11-02 16:17 ` [PATCH v7 2/7] irqchip/gic-v3: Enable support for SGIs to act as NMIs Masayoshi Mizuma
2020-11-18 11:54 ` ito-yuichi
2020-11-02 11:44 ` [PATCH v7 3/7] arm64: smp: Assign and setup an IPI as NMI Sumit Garg
2020-11-02 16:19 ` Masayoshi Mizuma
2020-11-02 11:44 ` [PATCH v7 4/7] nmi: backtrace: Allow runtime arch specific override Sumit Garg
2021-01-05 10:32 ` Sumit Garg
2020-11-02 11:44 ` [PATCH v7 5/7] arm64: ipi_nmi: Add support for NMI backtrace Sumit Garg
2020-11-02 16:21 ` Masayoshi Mizuma
2020-11-02 11:44 ` [PATCH v7 6/7] kgdb: Expose default CPUs roundup fallback mechanism Sumit Garg
2020-11-02 11:44 ` [PATCH v7 7/7] arm64: kgdb: Roundup cpus using IPI as NMI Sumit Garg
2021-06-25 14:54 ` Chen-Yu Tsai
2021-01-05 10:34 ` [PATCH v7 0/7] arm64: Add framework to turn an " Sumit Garg
2021-01-05 10:43 ` Marc Zyngier
2021-07-07 6:03 ` Sumit Garg
2021-06-25 14:56 ` Chen-Yu Tsai
2021-07-07 5:59 ` Sumit Garg
2022-01-12 19:31 ` Masayoshi Mizuma
2022-01-13 11:00 ` Sumit Garg
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