From: Tiezhu Yang <yangtiezhu@loongson.cn>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Huacai Chen <chenhc@lemote.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
Xuefeng Li <lixuefeng@loongson.cn>
Subject: [PATCH v2 1/6] MIPS: Loongson64: Do not write the read only field LPA of CP0_CONFIG3
Date: Tue, 3 Nov 2020 11:15:01 +0800 [thread overview]
Message-ID: <1604373306-3599-2-git-send-email-yangtiezhu@loongson.cn> (raw)
In-Reply-To: <1604373306-3599-1-git-send-email-yangtiezhu@loongson.cn>
The field LPA of CP0_CONFIG3 register is read only for Loongson64, so the
write operations are meaningless, remove them.
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
---
v2: No changes
arch/mips/include/asm/mach-loongson64/kernel-entry-init.h | 8 --------
arch/mips/loongson64/numa.c | 3 ---
2 files changed, 11 deletions(-)
diff --git a/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h b/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h
index 87a5bfb..e4d77f4 100644
--- a/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h
+++ b/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h
@@ -19,10 +19,6 @@
.macro kernel_entry_setup
.set push
.set mips64
- /* Set LPA on LOONGSON3 config3 */
- mfc0 t0, CP0_CONFIG3
- or t0, (0x1 << 7)
- mtc0 t0, CP0_CONFIG3
/* Set ELPA on LOONGSON3 pagegrain */
mfc0 t0, CP0_PAGEGRAIN
or t0, (0x1 << 29)
@@ -54,10 +50,6 @@
.macro smp_slave_setup
.set push
.set mips64
- /* Set LPA on LOONGSON3 config3 */
- mfc0 t0, CP0_CONFIG3
- or t0, (0x1 << 7)
- mtc0 t0, CP0_CONFIG3
/* Set ELPA on LOONGSON3 pagegrain */
mfc0 t0, CP0_PAGEGRAIN
or t0, (0x1 << 29)
diff --git a/arch/mips/loongson64/numa.c b/arch/mips/loongson64/numa.c
index cf9459f..c7e3cced 100644
--- a/arch/mips/loongson64/numa.c
+++ b/arch/mips/loongson64/numa.c
@@ -40,9 +40,6 @@ static void enable_lpa(void)
unsigned long value;
value = __read_32bit_c0_register($16, 3);
- value |= 0x00000080;
- __write_32bit_c0_register($16, 3, value);
- value = __read_32bit_c0_register($16, 3);
pr_info("CP0_Config3: CP0 16.3 (0x%lx)\n", value);
value = __read_32bit_c0_register($5, 1);
--
2.1.0
next prev parent reply other threads:[~2020-11-03 3:15 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-03 3:15 [PATCH v2 0/6] Modify some registers operations and move decode_cpucfg() to loongson_regs.h Tiezhu Yang
2020-11-03 3:15 ` Tiezhu Yang [this message]
2020-11-03 3:15 ` [PATCH v2 2/6] MIPS: Loongson64: Set the field ELPA of CP0_PAGEGRAIN only once Tiezhu Yang
2020-11-03 3:15 ` [PATCH v2 3/6] MIPS: Loongson64: Set IPI_Enable register per core by itself Tiezhu Yang
2020-11-03 3:15 ` [PATCH v2 4/6] MIPS: Loongson64: Add Mail_Send support for 3A4000+ CPU Tiezhu Yang
2020-11-03 3:15 ` [PATCH v2 5/6] MIPS: Loongson64: Make sure the PC address is correct when 3A4000+ CPU hotplug Tiezhu Yang
2020-11-03 5:28 ` Jiaxun Yang
2020-11-03 6:17 ` Tiezhu Yang
2020-11-03 3:15 ` [PATCH v2 6/6] MIPS: Loongson64: Move decode_cpucfg() to loongson_regs.h Tiezhu Yang
2020-11-03 5:33 ` Jiaxun Yang
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