From: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
To: <broonie@kernel.org>, <robh+dt@kernel.org>, <joel@jms.id.au>,
<andrew@aj.id.au>, <clg@kaod.org>, <bbrezillon@kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-aspeed@lists.ozlabs.org>, <linux-spi@vger.kernel.org>
Cc: <BMC-SW@aspeedtech.com>
Subject: [v2 3/4] ARM: dts: aspeed: ast2600-evb: Adjust SPI flash configuration
Date: Tue, 3 Nov 2020 15:22:01 +0800 [thread overview]
Message-ID: <20201103072202.24705-4-chin-ting_kuo@aspeedtech.com> (raw)
In-Reply-To: <20201103072202.24705-1-chin-ting_kuo@aspeedtech.com>
- Enable FMC CS1 and SPI2 CS0 SPI NOR flashes since both of
these two flashes are mounted on AST2600 EVB by default.
- Remove spi-max-frequency setting: 50MHz is usual SPI bus
frequency adopted on AST2600 EVB which has already been
configured in aspeed-g6.dtsi.
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
---
arch/arm/boot/dts/aspeed-ast2600-evb.dts | 26 ++++++++++++++++++++----
1 file changed, 22 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb.dts b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
index 8d0f4656aa05..5a2e4612d155 100644
--- a/arch/arm/boot/dts/aspeed-ast2600-evb.dts
+++ b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
@@ -96,12 +96,11 @@
&fmc {
status = "okay";
+
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
- spi-max-frequency = <50000000>;
-
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
@@ -133,18 +132,37 @@
};
};
};
+
+ flash@1 {
+ status = "okay";
+ m25p,fast-read;
+ label = "fmc0:1";
+ };
};
&spi1 {
status = "okay";
+
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
m25p,fast-read;
- label = "pnor";
- spi-max-frequency = <100000000>;
+ label = "spi1:0";
+ };
+};
+
+&spi2 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi2_default>;
+
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+ label = "spi2:0";
};
};
--
2.17.1
next prev parent reply other threads:[~2020-11-03 7:23 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-03 7:21 [v2 0/4] Porting ASPEED FMC/SPI memory controller driver Chin-Ting Kuo
2020-11-03 7:21 ` [v2 1/4] dt-bindings: spi: Add binding file for ASPEED FMC/SPI memory controller Chin-Ting Kuo
2020-11-05 18:40 ` Rob Herring
2020-11-06 9:03 ` Chin-Ting Kuo
2020-11-03 7:22 ` [v2 2/4] ARM: dts: aspeed: ast2600: Update FMC/SPI controller setting for spi-aspeed.c Chin-Ting Kuo
2020-11-03 7:22 ` Chin-Ting Kuo [this message]
2020-11-03 7:22 ` [v2 4/4] spi: aspeed: Add ASPEED FMC/SPI memory controller driver Chin-Ting Kuo
2020-11-04 20:39 ` Mark Brown
2020-11-05 11:27 ` Chin-Ting Kuo
2020-12-01 13:57 ` [v2 0/4] Porting " Mark Brown
2020-12-02 21:19 ` Joel Stanley
2020-12-03 10:32 ` Mark Brown
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201103072202.24705-4-chin-ting_kuo@aspeedtech.com \
--to=chin-ting_kuo@aspeedtech.com \
--cc=BMC-SW@aspeedtech.com \
--cc=andrew@aj.id.au \
--cc=bbrezillon@kernel.org \
--cc=broonie@kernel.org \
--cc=clg@kaod.org \
--cc=devicetree@vger.kernel.org \
--cc=joel@jms.id.au \
--cc=linux-aspeed@lists.ozlabs.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).