[v5,05/14] dt-bindings: reset: imx8mp: Add media blk_ctl reset IDs
diff mbox series

Message ID 1604402306-5348-6-git-send-email-abel.vesa@nxp.com
State New, archived
Headers show
Series
  • Add BLK_CTL support for i.MX8MP
Related show

Commit Message

Abel Vesa Nov. 3, 2020, 11:18 a.m. UTC
These will be used by the imx8mp for blk_ctl driver.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
---
 include/dt-bindings/reset/imx8mp-reset.h | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

Comments

Stephen Boyd Nov. 5, 2020, 1:06 a.m. UTC | #1
Quoting Abel Vesa (2020-11-03 03:18:17)
> These will be used by the imx8mp for blk_ctl driver.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> Acked-by: Rob Herring <robh@kernel.org>
> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
> ---

Acked-by: Stephen Boyd <sboyd@kernel.org>

Patch
diff mbox series

diff --git a/include/dt-bindings/reset/imx8mp-reset.h b/include/dt-bindings/reset/imx8mp-reset.h
index 6c7f17f..ba70248 100644
--- a/include/dt-bindings/reset/imx8mp-reset.h
+++ b/include/dt-bindings/reset/imx8mp-reset.h
@@ -52,4 +52,32 @@ 
 
 #define IMX8MP_AUDIO_BLK_CTL_RESET_NUM		2
 
+#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_DSI_PCLK	0
+#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_DSI_CLKREF	1
+#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_CSI_PCLK	2
+#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_CSI_ACLK	3
+#define IMX8MP_MEDIA_BLK_CTL_RESET_LCDIF_PIXEL		4
+#define IMX8MP_MEDIA_BLK_CTL_RESET_LCDIF_APB		5
+#define IMX8MP_MEDIA_BLK_CTL_RESET_ISI_PROC		6
+#define IMX8MP_MEDIA_BLK_CTL_RESET_ISI_APB		7
+#define IMX8MP_MEDIA_BLK_CTL_RESET_BUS_BLK		8
+#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_CSI2_PCLK	9
+#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_CSI2_ACLK	10
+#define IMX8MP_MEDIA_BLK_CTL_RESET_LCDIF2_PIXEL		11
+#define IMX8MP_MEDIA_BLK_CTL_RESET_LCDIF2_APB		12
+#define IMX8MP_MEDIA_BLK_CTL_RESET_ISP1_COR		13
+#define IMX8MP_MEDIA_BLK_CTL_RESET_ISP1_AXI		14
+#define IMX8MP_MEDIA_BLK_CTL_RESET_ISP1_AHB		15
+#define IMX8MP_MEDIA_BLK_CTL_RESET_ISP0_COR		16
+#define IMX8MP_MEDIA_BLK_CTL_RESET_ISP0_AXI		17
+#define IMX8MP_MEDIA_BLK_CTL_RESET_ISP0_AHB		18
+#define IMX8MP_MEDIA_BLK_CTL_RESET_DWE_COR		19
+#define IMX8MP_MEDIA_BLK_CTL_RESET_DWE_AXI		20
+#define IMX8MP_MEDIA_BLK_CTL_RESET_DWE_AHB		21
+#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_DSI2		22
+#define IMX8MP_MEDIA_BLK_CTL_RESET_LCDIF_AXI		23
+#define IMX8MP_MEDIA_BLK_CTL_RESET_LCDIF2_AXI		24
+
+#define IMX8MP_MEDIA_BLK_CTL_RESET_NUM			25
+
 #endif