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From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	Rob Herring <robh@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
	Nicolas Boichat <drinkcat@chromium.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>, <linux-clk@vger.kernel.org>,
	<srv_heupstream@mediatek.com>, Weiyi Lu <weiyi.lu@mediatek.com>,
	Yingjoe Chen <yingjoe.chen@mediatek.com>
Subject: [PATCH v5 04/24] dt-bindings: ARM: Mediatek: Add new document bindings of scp adsp controller
Date: Mon, 9 Nov 2020 10:03:29 +0800	[thread overview]
Message-ID: <1604887429-29445-5-git-send-email-weiyi.lu@mediatek.com> (raw)
In-Reply-To: <1604887429-29445-1-git-send-email-weiyi.lu@mediatek.com>

This patch adds the new binding documentation of scp adsp controller
for Mediatek MT8192.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
---
 .../bindings/arm/mediatek/mediatek,scp-adsp.yaml   | 38 ++++++++++++++++++++++
 1 file changed, 38 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,scp-adsp.yaml

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,scp-adsp.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,scp-adsp.yaml
new file mode 100644
index 0000000..24df35d
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,scp-adsp.yaml
@@ -0,0 +1,38 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,scp-adsp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek SCP ADSP Controller
+
+maintainers:
+  - Weiyi Lu <weiyi.lu@mediatek.com>
+
+description:
+  The Mediatek scp adsp controller provides functional configurations and clocks to the system.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - mediatek,mt8192-scp_adsp
+      - const: syscon
+
+  reg:
+    maxItems: 1
+
+  '#clock-cells':
+    const: 1
+
+required:
+  - compatible
+  - reg
+
+examples:
+  - |
+    scp_adsp: syscon@10720000 {
+        compatible = "mediatek,mt8192-scp_adsp", "syscon";
+        reg = <0x10720000 0x1000>;
+        #clock-cells = <1>;
+    };
-- 
1.8.1.1.dirty

  parent reply	other threads:[~2020-11-09  2:09 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-09  2:03 [PATCH v5 00/24] Mediatek MT8192 clock support Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 01/24] dt-bindings: ARM: Mediatek: Add new document bindings of imp i2c wrapper controller Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 02/24] dt-bindings: ARM: Mediatek: Add new document bindings of mdpsys controller Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 03/24] dt-bindings: ARM: Mediatek: Add new document bindings of msdc controller Weiyi Lu
2020-11-09  2:03 ` Weiyi Lu [this message]
2020-11-09  2:03 ` [PATCH v5 05/24] dt-bindings: ARM: Mediatek: Document bindings of MT8192 clock controllers Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 06/24] clk: mediatek: Add dt-bindings of MT8192 clocks Weiyi Lu
2020-11-10 16:03   ` Rob Herring
2020-11-09  2:03 ` [PATCH v5 07/24] clk: mediatek: Fix asymmetrical PLL enable and disable control Weiyi Lu
2020-11-18  3:55   ` Ikjoon Jang
2020-11-18  5:21     ` Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 08/24] clk: mediatek: Add configurable enable control to mtk_pll_data Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 09/24] clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 10/24] clk: mediatek: Add MT8192 basic clocks support Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 11/24] clk: mediatek: Add MT8192 audio clock support Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 12/24] clk: mediatek: Add MT8192 camsys " Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 13/24] clk: mediatek: Add MT8192 imgsys " Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 14/24] clk: mediatek: Add MT8192 imp i2c wrapper " Weiyi Lu
2020-11-18  2:41   ` Yingjoe Chen
2020-11-18  3:49     ` Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 15/24] clk: mediatek: Add MT8192 ipesys " Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 16/24] clk: mediatek: Add MT8192 mdpsys " Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 17/24] clk: mediatek: Add MT8192 mfgcfg " Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 18/24] clk: mediatek: Add MT8192 mmsys " Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 19/24] clk: mediatek: Add MT8192 msdc " Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 20/24] clk: mediatek: Add MT8192 scp adsp " Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 21/24] clk: mediatek: Add MT8192 vdecsys " Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 22/24] clk: mediatek: Add MT8192 vencsys " Weiyi Lu
2020-11-09  2:03 ` [PATCH v5 23/24] arm64: dts: mediatek: Add mt8192 clock controllers Weiyi Lu
2020-11-23  4:02   ` Ikjoon Jang
2020-12-17  8:53     ` Stephen Boyd
2020-11-09  2:03 ` [PATCH v5 24/24] arm64: dts: mediatek: Correct UART0 bus clock of MT8192 Weiyi Lu
2020-12-17  9:19 ` [PATCH v5 00/24] Mediatek MT8192 clock support Stephen Boyd

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