From: Peter Ujfalusi <peter.ujfalusi@ti.com>
To: <vkoul@kernel.org>, <nm@ti.com>, <ssantosh@kernel.org>,
<robh+dt@kernel.org>
Cc: <dan.j.williams@intel.com>, <t-kristo@ti.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<dmaengine@vger.kernel.org>, <vigneshr@ti.com>,
<grygorii.strashko@ti.com>
Subject: [PATCH v2 11/19] dt-bindings: dma: ti: Add document for K3 PKTDMA
Date: Tue, 17 Nov 2020 12:56:48 +0200 [thread overview]
Message-ID: <20201117105656.5236-12-peter.ujfalusi@ti.com> (raw)
In-Reply-To: <20201117105656.5236-1-peter.ujfalusi@ti.com>
New binding document for
Texas Instruments K3 Packet DMA (PKTDMA).
PKTDMA is introduced as part of AM64.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
.../devicetree/bindings/dma/ti/k3-pktdma.yaml | 183 ++++++++++++++++++
1 file changed, 183 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml
diff --git a/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml b/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml
new file mode 100644
index 000000000000..bf49b0135fbe
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml
@@ -0,0 +1,183 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/ti/k3-pktdma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments K3 DMSS PKTDMA Device Tree Bindings
+
+maintainers:
+ - Peter Ujfalusi <peter.ujfalusi@ti.com>
+
+description: |
+ The Packet DMA (PKTDMA) is intended to perform similar functions as the packet
+ mode channels of K3 UDMA-P.
+ PKTDMA only includes Split channels to service PSI-L based peripherals.
+
+ The peripherals can be PSI-L native or legacy, non PSI-L native peripherals
+ with PDMAs. PDMA is tasked to act as a bridge between the PSI-L fabric and the
+ legacy peripheral.
+
+ PDMAs can be configured via PKTDMA split channel's peer registers to match
+ with the configuration of the legacy peripheral.
+
+allOf:
+ - $ref: /schemas/dma/dma-controller.yaml#
+
+properties:
+ "#dma-cells":
+ const: 2
+ description: |
+ The first cell is the PSI-L thread ID of the remote (to PKTDMA) end.
+ Valid ranges for thread ID depends on the data movement direction:
+ for source thread IDs (rx): 0 - 0x7fff
+ for destination thread IDs (tx): 0x8000 - 0xffff
+
+ Please refer to the device documentation for the PSI-L thread map and also
+ the PSI-L peripheral chapter for the correct thread ID.
+
+ The second cell is the ASEL value for the channel
+
+ compatible:
+ enum:
+ - ti,am64-dmss-pktdma
+
+ "#address-cells":
+ const: 2
+
+ "#size-cells":
+ const: 2
+
+ reg:
+ maxItems: 4
+
+ reg-names:
+ items:
+ - const: gcfg
+ - const: rchanrt
+ - const: tchanrt
+ - const: ringrt
+
+ msi-parent: true
+
+ ti,sci-rm-range-tchan:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description: |
+ Array of PKTDMA split tx channel resource subtypes for resource allocation
+ for this host
+ minItems: 1
+ # Should be enough
+ maxItems: 255
+ items:
+ maximum: 0x3f
+
+ ti,sci-rm-range-tflow:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description: |
+ Array of PKTDMA split tx flow resource subtypes for resource allocation
+ for this host
+ minItems: 1
+ # Should be enough
+ maxItems: 255
+ items:
+ maximum: 0x3f
+
+ ti,sci-rm-range-rchan:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description: |
+ Array of PKTDMA split rx channel resource subtypes for resource allocation
+ for this host
+ minItems: 1
+ # Should be enough
+ maxItems: 255
+ items:
+ maximum: 0x3f
+
+ ti,sci-rm-range-rflow:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description: |
+ Array of PKTDMA split rx flow resource subtypes for resource allocation
+ for this host
+ minItems: 1
+ # Should be enough
+ maxItems: 255
+ items:
+ maximum: 0x3f
+
+required:
+ - compatible
+ - "#address-cells"
+ - "#size-cells"
+ - "#dma-cells"
+ - reg
+ - reg-names
+ - msi-parent
+ - ti,sci
+ - ti,sci-dev-id
+ - ti,sci-rm-range-tchan
+ - ti,sci-rm-range-tflow
+ - ti,sci-rm-range-rchan
+ - ti,sci-rm-range-rflow
+
+unevaluatedProperties: false
+
+examples:
+ - |+
+ cbass_main {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ main_dmss {
+ compatible = "simple-mfd";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ dma-ranges;
+ ranges;
+
+ ti,sci-dev-id = <25>;
+
+ main_pktdma: dma-controller@485c0000 {
+ compatible = "ti,am64-dmss-pktdma";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ reg = <0x0 0x485c0000 0x0 0x100>,
+ <0x0 0x4a800000 0x0 0x20000>,
+ <0x0 0x4aa00000 0x0 0x40000>,
+ <0x0 0x4b800000 0x0 0x400000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
+ msi-parent = <&inta_main_dmss>;
+ #dma-cells = <2>;
+
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <30>;
+
+ ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
+ <0x24>, /* CPSW_TX_CHAN */
+ <0x25>, /* SAUL_TX_0_CHAN */
+ <0x26>, /* SAUL_TX_1_CHAN */
+ <0x27>, /* ICSSG_0_TX_CHAN */
+ <0x28>; /* ICSSG_1_TX_CHAN */
+ ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
+ <0x11>, /* RING_CPSW_TX_CHAN */
+ <0x12>, /* RING_SAUL_TX_0_CHAN */
+ <0x13>, /* RING_SAUL_TX_1_CHAN */
+ <0x14>, /* RING_ICSSG_0_TX_CHAN */
+ <0x15>; /* RING_ICSSG_1_TX_CHAN */
+ ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
+ <0x2b>, /* CPSW_RX_CHAN */
+ <0x2d>, /* SAUL_RX_0_CHAN */
+ <0x2f>, /* SAUL_RX_1_CHAN */
+ <0x31>, /* SAUL_RX_2_CHAN */
+ <0x33>, /* SAUL_RX_3_CHAN */
+ <0x35>, /* ICSSG_0_RX_CHAN */
+ <0x37>; /* ICSSG_1_RX_CHAN */
+ ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
+ <0x2c>, /* FLOW_CPSW_RX_CHAN */
+ <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
+ <0x32>, /* FLOW_SAUL_RX_2/3_CHAN */
+ <0x36>, /* FLOW_ICSSG_0_RX_CHAN */
+ <0x38>; /* FLOW_ICSSG_1_RX_CHAN */
+ };
+ };
+ };
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
next prev parent reply other threads:[~2020-11-17 10:57 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-17 10:56 [PATCH v2 00/19] dmaengine/soc: k3-udma: Add support for BCDMA and PKTDMA Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 01/19] dmaengine: ti: k3-udma: Correct normal channel offset when uchan_cnt is not 0 Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 02/19] dmaengine: ti: k3-udma: Wait for peer teardown completion if supported Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 03/19] dmaengine: ti: k3-udma: Add support for second resource range from sysfw Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 04/19] dmaengine: ti: k3-udma-glue: Add function to get device pointer for DMA API Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 05/19] dmaengine: ti: k3-udma-glue: Configure the dma_dev for rings Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 06/19] dmaengine: of-dma: Add support for optional router configuration callback Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 07/19] dmaengine: Add support for per channel coherency handling Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 08/19] dmaengine: doc: client: Update for dmaengine_get_dma_device() usage Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 09/19] dmaengine: dmatest: Use dmaengine_get_dma_device Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 10/19] dt-bindings: dma: ti: Add document for K3 BCDMA Peter Ujfalusi
2020-12-07 19:42 ` Rob Herring
2020-12-08 6:40 ` Peter Ujfalusi
2020-11-17 10:56 ` Peter Ujfalusi [this message]
2020-11-17 10:56 ` [PATCH v2 12/19] dmaengine: ti: k3-psil: Extend psil_endpoint_config for K3 PKTDMA Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 13/19] dmaengine: ti: k3-psil: Add initial map for AM64 Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 14/19] dmaengine: ti: Add support for k3 event routers Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 15/19] soc: ti: k3-ringacc: add AM64 DMA rings support Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 16/19] dmaengine: ti: k3-udma: Initial support for K3 BCDMA Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 17/19] dmaengine: ti: k3-udma: Add support for BCDMA channel TPL handling Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 18/19] dmaengine: ti: k3-udma: Initial support for K3 PKTDMA Peter Ujfalusi
2020-11-17 10:56 ` [PATCH v2 19/19] dmaengine: ti: k3-udma-glue: Add " Peter Ujfalusi
2020-11-27 7:18 ` [PATCH] dmaengine: ti: k3-udma-glue: Add new class for glue channels Peter Ujfalusi
2020-11-24 17:08 ` [PATCH v2 00/19] dmaengine/soc: k3-udma: Add support for BCDMA and PKTDMA Vinod Koul
2020-12-07 7:29 ` Peter Ujfalusi
2020-12-07 15:59 ` santosh.shilimkar
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