From: Jon Hunter <jonathanh@nvidia.com>
To: Thierry Reding <treding@nvidia.com>
Cc: Rob Herring <robh+dt@kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, Jon Hunter <jonathanh@nvidia.com>
Subject: [PATCH] dt-bindings: Correct GV11B GPU register sizes
Date: Tue, 24 Nov 2020 12:18:42 +0000 [thread overview]
Message-ID: <20201124121842.1037035-1-jonathanh@nvidia.com> (raw)
Commit 90a09178f309 ("dt-bindings: Add documentation for GV11B GPU")
added the GV11B GPU device-tree bindings information but incorrectly
added an additional 0 to the size of the addresses in the example.
Fixes: 90a09178f309 ("dt-bindings: Add documentation for GV11B GPU")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
---
Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
index 662a3c8a7d29..cc6ce5221a38 100644
--- a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
+++ b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
@@ -97,8 +97,8 @@ Example for GV11B:
gpu@17000000 {
compatible = "nvidia,gv11b";
- reg = <0x17000000 0x10000000>,
- <0x18000000 0x10000000>;
+ reg = <0x17000000 0x1000000>,
+ <0x18000000 0x1000000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "stall", "nonstall";
--
2.25.1
next reply other threads:[~2020-11-24 12:19 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-24 12:18 Jon Hunter [this message]
2020-11-30 12:23 ` [PATCH] dt-bindings: Correct GV11B GPU register sizes Thierry Reding
2020-12-07 23:13 ` Rob Herring
2020-12-08 13:52 ` Thierry Reding
2020-12-10 22:34 ` Rob Herring
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