From: "周琰杰 (Zhou Yanjie)" <zhouyanjie@wanyeetech.com>
To: sboyd@kernel.org, robh+dt@kernel.org, mturquette@baylibre.com,
paul@crapouillou.net
Cc: linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, dongsheng.qiu@ingenic.com,
aric.pzqi@ingenic.com, rick.tyliu@ingenic.com,
yanfei.li@ingenic.com, sernia.zhou@foxmail.com,
zhenwenjin@gmail.com
Subject: [PATCH 2/4] dt-bindings: clock: Add missing clocks for Ingenic SoCs.
Date: Thu, 26 Nov 2020 01:26:16 +0800 [thread overview]
Message-ID: <20201125172618.112707-3-zhouyanjie@wanyeetech.com> (raw)
In-Reply-To: <20201125172618.112707-1-zhouyanjie@wanyeetech.com>
Add CIM, AIC, DMIC clocks bindings for the X1000 SoC, and CIM, AIC,
DMIC, I2S clocks for the X1830 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
---
include/dt-bindings/clock/x1000-cgu.h | 3 +++
include/dt-bindings/clock/x1830-cgu.h | 4 ++++
2 files changed, 7 insertions(+)
diff --git a/include/dt-bindings/clock/x1000-cgu.h b/include/dt-bindings/clock/x1000-cgu.h
index f187e07..fa92257 100644
--- a/include/dt-bindings/clock/x1000-cgu.h
+++ b/include/dt-bindings/clock/x1000-cgu.h
@@ -50,5 +50,8 @@
#define X1000_CLK_PDMA 35
#define X1000_CLK_EXCLK_DIV512 36
#define X1000_CLK_RTC 37
+#define X1000_CLK_CIM 38
+#define X1000_CLK_AIC 39
+#define X1000_CLK_DMIC 40
#endif /* __DT_BINDINGS_CLOCK_X1000_CGU_H__ */
diff --git a/include/dt-bindings/clock/x1830-cgu.h b/include/dt-bindings/clock/x1830-cgu.h
index 8845537..3732507 100644
--- a/include/dt-bindings/clock/x1830-cgu.h
+++ b/include/dt-bindings/clock/x1830-cgu.h
@@ -53,5 +53,9 @@
#define X1830_CLK_OST 38
#define X1830_CLK_EXCLK_DIV512 39
#define X1830_CLK_RTC 40
+#define X1830_CLK_CIM 41
+#define X1830_CLK_AIC 42
+#define X1830_CLK_DMIC 43
+#define X1830_CLK_I2S 44
#endif /* __DT_BINDINGS_CLOCK_X1830_CGU_H__ */
--
2.7.4
next prev parent reply other threads:[~2020-11-25 17:27 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-25 17:26 [PATCH 0/4] Add new clocks for Ingenic SoCs 周琰杰 (Zhou Yanjie)
2020-11-25 17:26 ` [PATCH 1/4] clk: JZ4780: Add function for disable the second core 周琰杰 (Zhou Yanjie)
2020-12-02 22:21 ` Paul Cercueil
2020-11-25 17:26 ` 周琰杰 (Zhou Yanjie) [this message]
2020-12-02 22:19 ` [PATCH 2/4] dt-bindings: clock: Add missing clocks for Ingenic SoCs Paul Cercueil
2020-12-08 16:05 ` Rob Herring
2020-11-25 17:26 ` [PATCH 3/4] clk: Ingenic: " 周琰杰 (Zhou Yanjie)
2020-12-02 22:18 ` Paul Cercueil
2020-12-05 15:11 ` Zhou Yanjie
2020-11-25 17:26 ` [PATCH 4/4] clk: Ingenic: Fill unused bits in parents and reformat code 周琰杰 (Zhou Yanjie)
2020-12-02 22:09 ` Paul Cercueil
2020-12-05 14:53 ` Zhou Yanjie
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