From: Abel Vesa <abel.vesa@nxp.com>
To: Stephen Boyd <sboyd@kernel.org>,
Sascha Hauer <kernel@pengutronix.de>, Peng Fan <peng.fan@nxp.com>,
Fabio Estevam <fabio.estevam@nxp.com>,
Anson Huang <anson.huang@nxp.com>,
Dong Aisheng <aisheng.dong@nxp.com>, Jacky Bai <ping.bai@nxp.com>
Cc: NXP Linux Team <linux-imx@nxp.com>,
linux-clk@vger.kernel.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-arm-kernel@lists.infradead.org,
Abel Vesa <abel.vesa@nxp.com>
Subject: [PATCH v2 1/5] clk: Add clk_gate_ro_ops for read-only gate clocks
Date: Thu, 26 Nov 2020 14:40:05 +0200 [thread overview]
Message-ID: <1606394409-12755-2-git-send-email-abel.vesa@nxp.com> (raw)
In-Reply-To: <1606394409-12755-1-git-send-email-abel.vesa@nxp.com>
The clocks that can be changed from outside of the clock common framework
scope (for example, EL3) need to have only the .is_enabled gate op.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
drivers/clk/clk-gate.c | 5 +++++
include/linux/clk-provider.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index 070dc47..41ca887 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -123,6 +123,11 @@ const struct clk_ops clk_gate_ops = {
};
EXPORT_SYMBOL_GPL(clk_gate_ops);
+const struct clk_ops clk_gate_ro_ops = {
+ .is_enabled = clk_gate_is_enabled,
+};
+EXPORT_SYMBOL_GPL(clk_gate_ro_ops);
+
struct clk_hw *__clk_hw_register_gate(struct device *dev,
struct device_node *np, const char *name,
const char *parent_name, const struct clk_hw *parent_hw,
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 86b7075..81ba1aa 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -483,6 +483,7 @@ struct clk_gate {
#define CLK_GATE_BIG_ENDIAN BIT(2)
extern const struct clk_ops clk_gate_ops;
+extern const struct clk_ops clk_gate_ro_ops;
struct clk_hw *__clk_hw_register_gate(struct device *dev,
struct device_node *np, const char *name,
const char *parent_name, const struct clk_hw *parent_hw,
--
2.7.4
next prev parent reply other threads:[~2020-11-26 12:42 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-26 12:40 [PATCH v2 0/5] clk: imx: Register the dram_apb and dram_alt as read-only Abel Vesa
2020-11-26 12:40 ` Abel Vesa [this message]
2020-11-26 12:40 ` [PATCH v2 2/5] clk: Add CLK_GET_PARENT_NOCACHE flag Abel Vesa
2020-11-26 12:40 ` [PATCH v2 3/5] clk: composite: Allow gate ops with only .is_enabled op Abel Vesa
2020-11-26 12:40 ` [PATCH v2 4/5] clk: imx: composite-8m: Add DRAM clock registration variant Abel Vesa
2020-11-26 12:40 ` [PATCH v2 5/5] clk: imx8m: Use dram variant registration for dram clocks Abel Vesa
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