| Message ID | 20201201093853.12070-5-shuo.a.liu@intel.com |
|---|---|
| State | New, archived |
| Headers | show |
| Series |
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| Related | show |
On Tue, Dec 01, 2020 at 05:38:39PM +0800, shuo.a.liu@intel.com wrote: > From: Shuo Liu <shuo.a.liu@intel.com> > > The Service VM communicates with the hypervisor via conventional > hypercalls. VMCALL instruction is used to make the hypercalls. > > ACRN hypercall ABI: > * Hypercall number is in R8 register. > * Up to 2 parameters are in RDI and RSI registers. > * Return value is in RAX register. > > Introduce the ACRN hypercall interfaces. Because GCC doesn't support R8 > register as direct register constraints, use supported constraint as > input with a explicit MOV to R8 in beginning of asm. > > Originally-by: Yakui Zhao <yakui.zhao@intel.com> > Signed-off-by: Shuo Liu <shuo.a.liu@intel.com> > Reviewed-by: Reinette Chatre <reinette.chatre@intel.com> > Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> > Cc: Dave Hansen <dave.hansen@intel.com> > Cc: Sean Christopherson <sean.j.christopherson@intel.com> > Cc: Dan Williams <dan.j.williams@intel.com> > Cc: Fengwei Yin <fengwei.yin@intel.com> > Cc: Zhi Wang <zhi.a.wang@intel.com> > Cc: Zhenyu Wang <zhenyuw@linux.intel.com> > Cc: Yu Wang <yu1.wang@intel.com> > Cc: Reinette Chatre <reinette.chatre@intel.com> > Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> > Cc: Borislav Petkov <bp@alien8.de> > Cc: Arvind Sankar <nivedita@alum.mit.edu> > Cc: Peter Zijlstra <peterz@infradead.org> > Cc: Nick Desaulniers <ndesaulniers@google.com> > Cc: Segher Boessenkool <segher@kernel.crashing.org> > --- > arch/x86/include/asm/acrn.h | 54 +++++++++++++++++++++++++++++++++++++ > 1 file changed, 54 insertions(+) The x86 bits in patches 2-4 look ok now, thanks! Acked-by: Borislav Petkov <bp@suse.de>
On Wed 30.Dec'20 at 18:33:05 +0100, Borislav Petkov wrote: >On Tue, Dec 01, 2020 at 05:38:39PM +0800, shuo.a.liu@intel.com wrote: >> From: Shuo Liu <shuo.a.liu@intel.com> >> >> The Service VM communicates with the hypervisor via conventional >> hypercalls. VMCALL instruction is used to make the hypercalls. >> >> ACRN hypercall ABI: >> * Hypercall number is in R8 register. >> * Up to 2 parameters are in RDI and RSI registers. >> * Return value is in RAX register. >> >> Introduce the ACRN hypercall interfaces. Because GCC doesn't support R8 >> register as direct register constraints, use supported constraint as >> input with a explicit MOV to R8 in beginning of asm. >> >> Originally-by: Yakui Zhao <yakui.zhao@intel.com> >> Signed-off-by: Shuo Liu <shuo.a.liu@intel.com> >> Reviewed-by: Reinette Chatre <reinette.chatre@intel.com> >> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> >> Cc: Dave Hansen <dave.hansen@intel.com> >> Cc: Sean Christopherson <sean.j.christopherson@intel.com> >> Cc: Dan Williams <dan.j.williams@intel.com> >> Cc: Fengwei Yin <fengwei.yin@intel.com> >> Cc: Zhi Wang <zhi.a.wang@intel.com> >> Cc: Zhenyu Wang <zhenyuw@linux.intel.com> >> Cc: Yu Wang <yu1.wang@intel.com> >> Cc: Reinette Chatre <reinette.chatre@intel.com> >> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> >> Cc: Borislav Petkov <bp@alien8.de> >> Cc: Arvind Sankar <nivedita@alum.mit.edu> >> Cc: Peter Zijlstra <peterz@infradead.org> >> Cc: Nick Desaulniers <ndesaulniers@google.com> >> Cc: Segher Boessenkool <segher@kernel.crashing.org> >> --- >> arch/x86/include/asm/acrn.h | 54 +++++++++++++++++++++++++++++++++++++ >> 1 file changed, 54 insertions(+) > >The x86 bits in patches 2-4 look ok now, thanks! > >Acked-by: Borislav Petkov <bp@suse.de> Thanks for review! Shuo
diff --git a/arch/x86/include/asm/acrn.h b/arch/x86/include/asm/acrn.h index 127f20672c5d..e003a01b7c67 100644 --- a/arch/x86/include/asm/acrn.h +++ b/arch/x86/include/asm/acrn.h @@ -21,4 +21,58 @@ static inline u32 acrn_cpuid_base(void) return 0; } +/* + * Hypercalls for ACRN + * + * - VMCALL instruction is used to implement ACRN hypercalls. + * - ACRN hypercall ABI: + * - Hypercall number is passed in R8 register. + * - Up to 2 arguments are passed in RDI, RSI. + * - Return value will be placed in RAX. + * + * Because GCC doesn't support R8 register as direct register constraints, use + * supported constraint as input with a explicit MOV to R8 in beginning of asm. + */ +static inline long acrn_hypercall0(unsigned long hcall_id) +{ + long result; + + asm volatile("movl %1, %%r8d\n\t" + "vmcall\n\t" + : "=a" (result) + : "g" (hcall_id) + : "r8", "memory"); + + return result; +} + +static inline long acrn_hypercall1(unsigned long hcall_id, + unsigned long param1) +{ + long result; + + asm volatile("movl %1, %%r8d\n\t" + "vmcall\n\t" + : "=a" (result) + : "g" (hcall_id), "D" (param1) + : "r8", "memory"); + + return result; +} + +static inline long acrn_hypercall2(unsigned long hcall_id, + unsigned long param1, + unsigned long param2) +{ + long result; + + asm volatile("movl %1, %%r8d\n\t" + "vmcall\n\t" + : "=a" (result) + : "g" (hcall_id), "D" (param1), "S" (param2) + : "r8", "memory"); + + return result; +} + #endif /* _ASM_X86_ACRN_H */