From: Michal Simek <michal.simek@xilinx.com>
To: linux-kernel@vger.kernel.org, monstr@monstr.eu,
michal.simek@xilinx.com, git@xilinx.com
Cc: Kalyani Akula <kalyani.akula@xilinx.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Manish Narani <manish.narani@xilinx.com>,
Rajan Vaja <rajan.vaja@xilinx.com>,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 04/12] arm64: dts: zynqmp: Enable and wire reset controller
Date: Wed, 2 Dec 2020 15:06:03 +0100 [thread overview]
Message-ID: <c0a99c5b0438e34073429624d99a2c3f16532016.1606917949.git.michal.simek@xilinx.com> (raw)
In-Reply-To: <cover.1606917949.git.michal.simek@xilinx.com>
Enable reset controller for several IPs.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 29 ++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 68923fbd0e89..4fa820f78d76 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -187,6 +187,11 @@ zynqmp_pcap: pcap {
xlnx_aes: zynqmp-aes {
compatible = "xlnx,zynqmp-aes";
};
+
+ zynqmp_reset: reset-controller {
+ compatible = "xlnx,zynqmp-reset";
+ #reset-cells = <1>;
+ };
};
};
@@ -466,6 +471,8 @@ gem0: ethernet@ff0b0000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&zynqmp_firmware PD_ETH_0>;
+ resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>;
+ reset-names = "gem0_rst";
};
gem1: ethernet@ff0c0000 {
@@ -478,6 +485,8 @@ gem1: ethernet@ff0c0000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&zynqmp_firmware PD_ETH_1>;
+ resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>;
+ reset-names = "gem1_rst";
};
gem2: ethernet@ff0d0000 {
@@ -490,6 +499,8 @@ gem2: ethernet@ff0d0000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&zynqmp_firmware PD_ETH_2>;
+ resets = <&zynqmp_reset ZYNQMP_RESET_GEM2>;
+ reset-names = "gem2_rst";
};
gem3: ethernet@ff0e0000 {
@@ -502,6 +513,8 @@ gem3: ethernet@ff0e0000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&zynqmp_firmware PD_ETH_3>;
+ resets = <&zynqmp_reset ZYNQMP_RESET_GEM3>;
+ reset-names = "gem3_rst";
};
gpio: gpio@ff0a0000 {
@@ -515,6 +528,8 @@ gpio: gpio@ff0a0000 {
#interrupt-cells = <2>;
reg = <0x0 0xff0a0000 0x0 0x1000>;
power-domains = <&zynqmp_firmware PD_GPIO>;
+ resets = <&zynqmp_reset ZYNQMP_RESET_GPIO>;
+ reset-names = "gpio_rst";
};
i2c0: i2c@ff020000 {
@@ -526,6 +541,8 @@ i2c0: i2c@ff020000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&zynqmp_firmware PD_I2C_0>;
+ resets = <&zynqmp_reset ZYNQMP_RESET_I2C0>;
+ reset-names = "i2c0_rst";
};
i2c1: i2c@ff030000 {
@@ -537,6 +554,8 @@ i2c1: i2c@ff030000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&zynqmp_firmware PD_I2C_1>;
+ resets = <&zynqmp_reset ZYNQMP_RESET_I2C1>;
+ reset-names = "i2c1_rst";
};
pcie: pcie@fd0e0000 {
@@ -602,6 +621,8 @@ sata: ahci@fd0c0000 {
interrupt-parent = <&gic>;
interrupts = <0 133 4>;
power-domains = <&zynqmp_firmware PD_SATA>;
+ resets = <&zynqmp_reset ZYNQMP_RESET_SATA>;
+ reset-names = "sata_rst";
};
sdhci0: mmc@ff160000 {
@@ -733,6 +754,10 @@ usb0: usb@fe200000 {
reg = <0x0 0xfe200000 0x0 0x40000>;
clock-names = "clk_xin", "clk_ahb";
power-domains = <&zynqmp_firmware PD_USB_0>;
+ resets = <&zynqmp_reset ZYNQMP_RESET_USB0_CORERESET>,
+ <&zynqmp_reset ZYNQMP_RESET_USB0_HIBERRESET>,
+ <&zynqmp_reset ZYNQMP_RESET_USB0_APB>;
+ reset-names = "usb0_crst", "usb0_hibrst", "usb0_apbrst";
};
usb1: usb@fe300000 {
@@ -743,6 +768,10 @@ usb1: usb@fe300000 {
reg = <0x0 0xfe300000 0x0 0x40000>;
clock-names = "clk_xin", "clk_ahb";
power-domains = <&zynqmp_firmware PD_USB_1>;
+ resets = <&zynqmp_reset ZYNQMP_RESET_USB1_CORERESET>,
+ <&zynqmp_reset ZYNQMP_RESET_USB1_HIBERRESET>,
+ <&zynqmp_reset ZYNQMP_RESET_USB1_APB>;
+ reset-names = "usb1_crst", "usb1_hibrst", "usb1_apbrst";
};
watchdog0: watchdog@fd4d0000 {
--
2.29.2
next prev parent reply other threads:[~2020-12-02 14:07 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-02 14:05 [PATCH 00/12] arm64: dts: zynqmp: DT updates to match latest drivers Michal Simek
2020-12-02 14:06 ` [PATCH 01/12] arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111 Michal Simek
2020-12-02 14:06 ` [PATCH 02/12] arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106 Michal Simek
2020-12-02 14:06 ` [PATCH 03/12] arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111 Michal Simek
2020-12-02 14:06 ` Michal Simek [this message]
2020-12-06 22:38 ` [PATCH 04/12] arm64: dts: zynqmp: Enable and wire reset controller Laurent Pinchart
2020-12-07 9:32 ` Michal Simek
2021-01-21 10:10 ` Michal Simek
2020-12-02 14:06 ` [PATCH 05/12] arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106 Michal Simek
2020-12-02 14:06 ` [PATCH 06/12] arm64: dts: zynqmp: Add label for zynqmp_ipi Michal Simek
2020-12-06 22:46 ` Laurent Pinchart
2020-12-06 22:48 ` Laurent Pinchart
2020-12-07 9:43 ` Michal Simek
2020-12-07 9:39 ` Michal Simek
2020-12-07 22:16 ` Laurent Pinchart
2020-12-08 7:26 ` Michal Simek
2021-01-21 22:29 ` Laurent Pinchart
2021-01-22 9:00 ` Michal Simek
2020-12-02 14:06 ` [PATCH 07/12] arm64: dts: zynqmp: Add missing mio-bank properties to sdhcis Michal Simek
2020-12-02 14:06 ` [PATCH 08/12] arm64: dts: zynqmp: Wire arasan nand controller Michal Simek
2020-12-02 14:06 ` [PATCH 09/12] arm64: dts: zynqmp: Wire zynqmp qspi controller Michal Simek
2020-12-02 14:06 ` [PATCH 10/12] arm64: dts: zynqmp: Add missing lpd watchdog node Michal Simek
2020-12-02 14:06 ` [PATCH 11/12] arm64: dts: zynqmp: Add missing iommu IDs Michal Simek
2020-12-02 14:06 ` [PATCH 12/12] arm64: dts: zynqmp: Add description for zcu104 revC Michal Simek
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