[v2] drivers/soc/litex: Add restart handler
diff mbox series

Message ID 20210104164500.1311091-1-geert@linux-m68k.org
State New, archived
Headers show
Series
  • [v2] drivers/soc/litex: Add restart handler
Related show

Commit Message

Geert Uytterhoeven Jan. 4, 2021, 4:45 p.m. UTC
Let the LiteX SoC Controller a register a restart handler, which resets
the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
---
Tested with linux-on-litex-vexriscv.

This patch is based on upstream, i.e. not on top of Gabriel Somlo's
"[PATCH v5 0/4] drivers/soc/litex: support 32-bit subregisters, 64-bit
CPUs"
(https://lore.kernel.org/lkml/20201227161320.2194830-1-gsomlo@gmail.com/)

v2:
  - Rebase on top of v5.11-rc1,
  - Change reset handler priority to recommended default value of 128
    (was 192).

(v1 was not sent to a mailing list)
---
 drivers/soc/litex/litex_soc_ctrl.c | 33 +++++++++++++++++++++++++++---
 1 file changed, 30 insertions(+), 3 deletions(-)

Comments

Geert Uytterhoeven Jan. 4, 2021, 4:49 p.m. UTC | #1
On Mon, Jan 4, 2021 at 5:45 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> Let the LiteX SoC Controller a register a restart handler, which resets
> the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
>
> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
> ---
> Tested with linux-on-litex-vexriscv.
>
> This patch is based on upstream, i.e. not on top of Gabriel Somlo's
> "[PATCH v5 0/4] drivers/soc/litex: support 32-bit subregisters, 64-bit
> CPUs"
> (https://lore.kernel.org/lkml/20201227161320.2194830-1-gsomlo@gmail.com/)

Bummer, and that's why the RESET_REG_* definitions are no longer
next to the SCRATCH_REG_* definitions :-(

Well, I assume that will be fixed by evolution ;-)

> v2:
>   - Rebase on top of v5.11-rc1,
>   - Change reset handler priority to recommended default value of 128
>     (was 192).
>
> (v1 was not sent to a mailing list)
> ---
>  drivers/soc/litex/litex_soc_ctrl.c | 33 +++++++++++++++++++++++++++---
>  1 file changed, 30 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/soc/litex/litex_soc_ctrl.c b/drivers/soc/litex/litex_soc_ctrl.c
> index 1217cafdfd4d1d2b..d729ad50d4ffca5e 100644
> --- a/drivers/soc/litex/litex_soc_ctrl.c
> +++ b/drivers/soc/litex/litex_soc_ctrl.c
> @@ -15,6 +15,11 @@
>  #include <linux/module.h>
>  #include <linux/errno.h>
>  #include <linux/io.h>
> +#include <linux/reboot.h>
> +
> +/* reset register located at the base address */
> +#define RESET_REG_OFF           0x00
> +#define RESET_REG_VALUE         0x00000001
>
>  /*
>   * LiteX SoC Generator, depending on the configuration, can split a single

Gr{oetje,eeting}s,

                        Geert
Stafford Horne Jan. 14, 2021, 2:03 a.m. UTC | #2
On Mon, Jan 04, 2021 at 05:49:03PM +0100, Geert Uytterhoeven wrote:
> On Mon, Jan 4, 2021 at 5:45 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > Let the LiteX SoC Controller a register a restart handler, which resets
> > the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
> >
> > Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
> > ---
> > Tested with linux-on-litex-vexriscv.
> >
> > This patch is based on upstream, i.e. not on top of Gabriel Somlo's
> > "[PATCH v5 0/4] drivers/soc/litex: support 32-bit subregisters, 64-bit
> > CPUs"
> > (https://lore.kernel.org/lkml/20201227161320.2194830-1-gsomlo@gmail.com/)
> 
> Bummer, and that's why the RESET_REG_* definitions are no longer
> next to the SCRATCH_REG_* definitions :-(

If it helps I have accepted Gabriel's patches and put them onto for-next.

  https://github.com/openrisc/linux/commits/for-next

I am happy to take and test a patch based on that.  Or I can do the adjustments
to base the patch on that myself.  Let me know.

-Stafford

> Well, I assume that will be fixed by evolution ;-)
> 
> > v2:
> >   - Rebase on top of v5.11-rc1,
> >   - Change reset handler priority to recommended default value of 128
> >     (was 192).
> >
> > (v1 was not sent to a mailing list)
> > ---
> >  drivers/soc/litex/litex_soc_ctrl.c | 33 +++++++++++++++++++++++++++---
> >  1 file changed, 30 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/soc/litex/litex_soc_ctrl.c b/drivers/soc/litex/litex_soc_ctrl.c
> > index 1217cafdfd4d1d2b..d729ad50d4ffca5e 100644
> > --- a/drivers/soc/litex/litex_soc_ctrl.c
> > +++ b/drivers/soc/litex/litex_soc_ctrl.c
> > @@ -15,6 +15,11 @@
> >  #include <linux/module.h>
> >  #include <linux/errno.h>
> >  #include <linux/io.h>
> > +#include <linux/reboot.h>
> > +
> > +/* reset register located at the base address */
> > +#define RESET_REG_OFF           0x00
> > +#define RESET_REG_VALUE         0x00000001
> >
> >  /*
> >   * LiteX SoC Generator, depending on the configuration, can split a single
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> -- 
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds
Geert Uytterhoeven Jan. 14, 2021, 1:48 p.m. UTC | #3
Hi Stafford,

On Thu, Jan 14, 2021 at 3:03 AM Stafford Horne <shorne@gmail.com> wrote:
> On Mon, Jan 04, 2021 at 05:49:03PM +0100, Geert Uytterhoeven wrote:
> > On Mon, Jan 4, 2021 at 5:45 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > Let the LiteX SoC Controller a register a restart handler, which resets
> > > the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
> > >
> > > Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
> > > ---
> > > Tested with linux-on-litex-vexriscv.
> > >
> > > This patch is based on upstream, i.e. not on top of Gabriel Somlo's
> > > "[PATCH v5 0/4] drivers/soc/litex: support 32-bit subregisters, 64-bit
> > > CPUs"
> > > (https://lore.kernel.org/lkml/20201227161320.2194830-1-gsomlo@gmail.com/)
> >
> > Bummer, and that's why the RESET_REG_* definitions are no longer
> > next to the SCRATCH_REG_* definitions :-(
>
> If it helps I have accepted Gabriel's patches and put them onto for-next.
>
>   https://github.com/openrisc/linux/commits/for-next
>
> I am happy to take and test a patch based on that.  Or I can do the adjustments
> to base the patch on that myself.  Let me know.

Thanks for letting me know! V3 sent.

Gr{oetje,eeting}s,

                        Geert
Stafford Horne Jan. 18, 2021, 11:43 a.m. UTC | #4
On Thu, Jan 14, 2021 at 02:48:49PM +0100, Geert Uytterhoeven wrote:
> Hi Stafford,
> 
> On Thu, Jan 14, 2021 at 3:03 AM Stafford Horne <shorne@gmail.com> wrote:
> > On Mon, Jan 04, 2021 at 05:49:03PM +0100, Geert Uytterhoeven wrote:
> > > On Mon, Jan 4, 2021 at 5:45 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > > Let the LiteX SoC Controller a register a restart handler, which resets
> > > > the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
> > > >
> > > > Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
> > > > ---
> > > > Tested with linux-on-litex-vexriscv.
> > > >
> > > > This patch is based on upstream, i.e. not on top of Gabriel Somlo's
> > > > "[PATCH v5 0/4] drivers/soc/litex: support 32-bit subregisters, 64-bit
> > > > CPUs"
> > > > (https://lore.kernel.org/lkml/20201227161320.2194830-1-gsomlo@gmail.com/)
> > >
> > > Bummer, and that's why the RESET_REG_* definitions are no longer
> > > next to the SCRATCH_REG_* definitions :-(
> >
> > If it helps I have accepted Gabriel's patches and put them onto for-next.
> >
> >   https://github.com/openrisc/linux/commits/for-next
> >
> > I am happy to take and test a patch based on that.  Or I can do the adjustments
> > to base the patch on that myself.  Let me know.
> 
> Thanks for letting me know! V3 sent.

Hi Geert,

I don't seem to see v3 anywhere.  Where did you send it and what is the subject?

-Stafford
Geert Uytterhoeven Jan. 18, 2021, 12:27 p.m. UTC | #5
Hi Stafford,

On Mon, Jan 18, 2021 at 12:43 PM Stafford Horne <shorne@gmail.com> wrote:
> On Thu, Jan 14, 2021 at 02:48:49PM +0100, Geert Uytterhoeven wrote:
> > On Thu, Jan 14, 2021 at 3:03 AM Stafford Horne <shorne@gmail.com> wrote:
> > > On Mon, Jan 04, 2021 at 05:49:03PM +0100, Geert Uytterhoeven wrote:
> > > > On Mon, Jan 4, 2021 at 5:45 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > > > Let the LiteX SoC Controller a register a restart handler, which resets
> > > > > the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
> > > > >
> > > > > Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
> > > > > ---
> > > > > Tested with linux-on-litex-vexriscv.
> > > > >
> > > > > This patch is based on upstream, i.e. not on top of Gabriel Somlo's
> > > > > "[PATCH v5 0/4] drivers/soc/litex: support 32-bit subregisters, 64-bit
> > > > > CPUs"
> > > > > (https://lore.kernel.org/lkml/20201227161320.2194830-1-gsomlo@gmail.com/)
> > > >
> > > > Bummer, and that's why the RESET_REG_* definitions are no longer
> > > > next to the SCRATCH_REG_* definitions :-(
> > >
> > > If it helps I have accepted Gabriel's patches and put them onto for-next.
> > >
> > >   https://github.com/openrisc/linux/commits/for-next
> > >
> > > I am happy to take and test a patch based on that.  Or I can do the adjustments
> > > to base the patch on that myself.  Let me know.
> >
> > Thanks for letting me know! V3 sent.
>
> Hi Geert,
>
> I don't seem to see v3 anywhere.  Where did you send it and what is the subject?

https://lore.kernel.org/linux-riscv/20210114134813.2238587-1-geert@linux-m68k.org/

So "b4 am 20210114134813.2238587-1-geert@linux-m68k.org" should give you
a copy.

Thanks!

Gr{oetje,eeting}s,

                        Geert
Stafford Horne Jan. 18, 2021, 9:15 p.m. UTC | #6
On Mon, Jan 18, 2021 at 01:27:32PM +0100, Geert Uytterhoeven wrote:
> Hi Stafford,
> 
> On Mon, Jan 18, 2021 at 12:43 PM Stafford Horne <shorne@gmail.com> wrote:
> > On Thu, Jan 14, 2021 at 02:48:49PM +0100, Geert Uytterhoeven wrote:
> > > On Thu, Jan 14, 2021 at 3:03 AM Stafford Horne <shorne@gmail.com> wrote:
> > > > On Mon, Jan 04, 2021 at 05:49:03PM +0100, Geert Uytterhoeven wrote:
> > > > > On Mon, Jan 4, 2021 at 5:45 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > > > > Let the LiteX SoC Controller a register a restart handler, which resets

I think there is a typo here:

  Let the LiteX SoC Controller a register a restart ...

should remove the first 'a' and say

 Let the LiteX SoC Controller register a restart ...

> > > > > > the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
> > > > > >
> > > > > > Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
> > > > > > ---
> > > > > > Tested with linux-on-litex-vexriscv.
> > > > > >
> > > > > > This patch is based on upstream, i.e. not on top of Gabriel Somlo's
> > > > > > "[PATCH v5 0/4] drivers/soc/litex: support 32-bit subregisters, 64-bit
> > > > > > CPUs"
> > > > > > (https://lore.kernel.org/lkml/20201227161320.2194830-1-gsomlo@gmail.com/)
> > > > >
> > > > > Bummer, and that's why the RESET_REG_* definitions are no longer
> > > > > next to the SCRATCH_REG_* definitions :-(
> > > >
> > > > If it helps I have accepted Gabriel's patches and put them onto for-next.
> > > >
> > > >   https://github.com/openrisc/linux/commits/for-next
> > > >
> > > > I am happy to take and test a patch based on that.  Or I can do the adjustments
> > > > to base the patch on that myself.  Let me know.
> > >
> > > Thanks for letting me know! V3 sent.
> >
> > Hi Geert,
> >
> > I don't seem to see v3 anywhere.  Where did you send it and what is the subject?
> 
> https://lore.kernel.org/linux-riscv/20210114134813.2238587-1-geert@linux-m68k.org/
> 
> So "b4 am 20210114134813.2238587-1-geert@linux-m68k.org" should give you
> a copy.

Thanks I got it, I am not sure why it does not show up in my inbox anywhere,
sometimes gmail drops mails.  Hence, I am replying here.

As per the typo above I can fix during applying or you could send during a v4.

One more small nit is that you move soc_ctrl_dev out to a static instance it
might help to mention.  But it's easy to see why.

-Stafford
Geert Uytterhoeven Jan. 19, 2021, 7:59 a.m. UTC | #7
Hi Stafford,

On Mon, Jan 18, 2021 at 10:16 PM Stafford Horne <shorne@gmail.com> wrote:
> On Mon, Jan 18, 2021 at 01:27:32PM +0100, Geert Uytterhoeven wrote:
> > On Mon, Jan 18, 2021 at 12:43 PM Stafford Horne <shorne@gmail.com> wrote:
> > > On Thu, Jan 14, 2021 at 02:48:49PM +0100, Geert Uytterhoeven wrote:
> > > > On Thu, Jan 14, 2021 at 3:03 AM Stafford Horne <shorne@gmail.com> wrote:
> > > > > On Mon, Jan 04, 2021 at 05:49:03PM +0100, Geert Uytterhoeven wrote:
> > > > > > On Mon, Jan 4, 2021 at 5:45 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > > > > > Let the LiteX SoC Controller a register a restart handler, which resets
>
> I think there is a typo here:
>
>   Let the LiteX SoC Controller a register a restart ...
>
> should remove the first 'a' and say
>
>  Let the LiteX SoC Controller register a restart ...
>
> > > > > > > the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
> > > > > > >
> > > > > > > Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
> > > > > > > ---
> > > > > > > Tested with linux-on-litex-vexriscv.
> > > > > > >
> > > > > > > This patch is based on upstream, i.e. not on top of Gabriel Somlo's
> > > > > > > "[PATCH v5 0/4] drivers/soc/litex: support 32-bit subregisters, 64-bit
> > > > > > > CPUs"
> > > > > > > (https://lore.kernel.org/lkml/20201227161320.2194830-1-gsomlo@gmail.com/)
> > > > > >
> > > > > > Bummer, and that's why the RESET_REG_* definitions are no longer
> > > > > > next to the SCRATCH_REG_* definitions :-(
> > > > >
> > > > > If it helps I have accepted Gabriel's patches and put them onto for-next.
> > > > >
> > > > >   https://github.com/openrisc/linux/commits/for-next
> > > > >
> > > > > I am happy to take and test a patch based on that.  Or I can do the adjustments
> > > > > to base the patch on that myself.  Let me know.
> > > >
> > > > Thanks for letting me know! V3 sent.
> > >
> > > Hi Geert,
> > >
> > > I don't seem to see v3 anywhere.  Where did you send it and what is the subject?
> >
> > https://lore.kernel.org/linux-riscv/20210114134813.2238587-1-geert@linux-m68k.org/
> >
> > So "b4 am 20210114134813.2238587-1-geert@linux-m68k.org" should give you
> > a copy.
>
> Thanks I got it, I am not sure why it does not show up in my inbox anywhere,
> sometimes gmail drops mails.  Hence, I am replying here.

You may want to add a rule to never mark as spam emails with "PATCH"
in the subject.  And check your spam folder regularly, and teach gmail by
marking non-spam as non-spam.

> As per the typo above I can fix during applying or you could send during a v4.
>
> One more small nit is that you move soc_ctrl_dev out to a static instance it
> might help to mention.  But it's easy to see why.

Found a way to get rid of it.  Will send v4 shortly.

Gr{oetje,eeting}s,

                        Geert

Patch
diff mbox series

diff --git a/drivers/soc/litex/litex_soc_ctrl.c b/drivers/soc/litex/litex_soc_ctrl.c
index 1217cafdfd4d1d2b..d729ad50d4ffca5e 100644
--- a/drivers/soc/litex/litex_soc_ctrl.c
+++ b/drivers/soc/litex/litex_soc_ctrl.c
@@ -15,6 +15,11 @@ 
 #include <linux/module.h>
 #include <linux/errno.h>
 #include <linux/io.h>
+#include <linux/reboot.h>
+
+/* reset register located at the base address */
+#define RESET_REG_OFF           0x00
+#define RESET_REG_VALUE         0x00000001
 
 /*
  * LiteX SoC Generator, depending on the configuration, can split a single
@@ -136,8 +141,20 @@  static int litex_check_csr_access(void __iomem *reg_addr)
 	return 0;
 }
 
-struct litex_soc_ctrl_device {
+static struct litex_soc_ctrl_device {
 	void __iomem *base;
+} *soc_ctrl_dev;
+
+static int litex_reset_handler(struct notifier_block *this, unsigned long mode,
+			       void *cmd)
+{
+	litex_write32(soc_ctrl_dev->base + RESET_REG_OFF, RESET_REG_VALUE);
+	return NOTIFY_DONE;
+}
+
+static struct notifier_block litex_reset_nb = {
+	.notifier_call = litex_reset_handler,
+	.priority = 128,
 };
 
 static const struct of_device_id litex_soc_ctrl_of_match[] = {
@@ -149,7 +166,7 @@  MODULE_DEVICE_TABLE(of, litex_soc_ctrl_of_match);
 
 static int litex_soc_ctrl_probe(struct platform_device *pdev)
 {
-	struct litex_soc_ctrl_device *soc_ctrl_dev;
+	int error;
 
 	soc_ctrl_dev = devm_kzalloc(&pdev->dev, sizeof(*soc_ctrl_dev), GFP_KERNEL);
 	if (!soc_ctrl_dev)
@@ -159,7 +176,17 @@  static int litex_soc_ctrl_probe(struct platform_device *pdev)
 	if (IS_ERR(soc_ctrl_dev->base))
 		return PTR_ERR(soc_ctrl_dev->base);
 
-	return litex_check_csr_access(soc_ctrl_dev->base);
+	error = litex_check_csr_access(soc_ctrl_dev->base);
+	if (error)
+		return error;
+
+	error = register_restart_handler(&litex_reset_nb);
+	if (error) {
+		dev_warn(&pdev->dev, "cannot register restart handler: %d\n",
+			 error);
+	}
+
+	return 0;
 }
 
 static struct platform_driver litex_soc_ctrl_driver = {