From: Alexandre Ghiti <alex@ghiti.fr>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>, Zong Li <zong.li@sifive.com>,
Anup Patel <anup@brainfault.org>, Christoph Hellwig <hch@lst.de>,
Ard Biesheuvel <ardb@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
linux-efi@vger.kernel.org, linux-arch@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Alexandre Ghiti <alex@ghiti.fr>,
Palmer Dabbelt <palmerdabbelt@google.com>
Subject: [RFC PATCH 11/12] riscv: Explicit comment about user virtual address space size
Date: Mon, 4 Jan 2021 14:58:39 -0500 [thread overview]
Message-ID: <20210104195840.1593-12-alex@ghiti.fr> (raw)
In-Reply-To: <20210104195840.1593-1-alex@ghiti.fr>
Define precisely the size of the user accessible virtual space size
for sv32/39/48 mmu types and explain why the whole virtual address
space is split into 2 equal chunks between kernel and user space.
Signed-off-by: Alexandre Ghiti <alex@ghiti.fr>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
---
arch/riscv/include/asm/pgtable.h | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 95721016049d..360858cdbfdd 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -465,8 +465,15 @@ static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
#endif
/*
- * Task size is 0x4000000000 for RV64 or 0x9fc00000 for RV32.
- * Note that PGDIR_SIZE must evenly divide TASK_SIZE.
+ * Task size is:
+ * - 0x9fc00000 (~2.5GB) for RV32.
+ * - 0x4000000000 ( 256GB) for RV64 using SV39 mmu
+ * - 0x800000000000 ( 128TB) for RV64 using SV48 mmu
+ *
+ * Note that PGDIR_SIZE must evenly divide TASK_SIZE since "RISC-V
+ * Instruction Set Manual Volume II: Privileged Architecture" states that
+ * "load and store effective addresses, which are 64bits, must have bits
+ * 63–48 all equal to bit 47, or else a page-fault exception will occur."
*/
#ifdef CONFIG_64BIT
#define TASK_SIZE (PGDIR_SIZE * PTRS_PER_PGD / 2)
--
2.20.1
next prev parent reply other threads:[~2021-01-04 20:11 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-04 19:58 [RFC PATCH 00/12] Introduce sv48 support without relocable kernel Alexandre Ghiti
2021-01-04 19:58 ` [RFC PATCH 01/12] riscv: Move kernel mapping outside of linear mapping Alexandre Ghiti
2021-01-05 11:40 ` Anup Patel
2021-01-06 6:36 ` Alex Ghiti
2021-01-06 6:44 ` Anup Patel
2021-01-06 8:16 ` Alex Ghiti
2021-01-04 19:58 ` [RFC PATCH 02/12] riscv: Protect the kernel " Alexandre Ghiti
2021-01-05 11:50 ` Anup Patel
2021-01-04 19:58 ` [RFC PATCH 03/12] riscv: Get rid of compile time logic with MAX_EARLY_MAPPING_SIZE Alexandre Ghiti
2021-01-04 19:58 ` [RFC PATCH 04/12] riscv: Allow to dynamically define VA_BITS Alexandre Ghiti
2021-01-05 12:06 ` Anup Patel
2021-01-06 6:38 ` Alex Ghiti
2021-01-04 19:58 ` [RFC PATCH 05/12] riscv: Simplify MAXPHYSMEM config Alexandre Ghiti
2021-01-04 19:58 ` [RFC PATCH 06/12] riscv: Prepare ptdump for vm layout dynamic addresses Alexandre Ghiti
2021-01-04 19:58 ` [RFC PATCH 07/12] asm-generic: Prepare for riscv use of pud_alloc_one and pud_free Alexandre Ghiti
2021-01-04 19:58 ` [RFC PATCH 08/12] riscv: Implement sv48 support Alexandre Ghiti
2021-01-04 19:58 ` [RFC PATCH 09/12] riscv: Allow user to downgrade to sv39 when hw supports sv48 Alexandre Ghiti
2021-01-04 19:58 ` [RFC PATCH 10/12] riscv: Use pgtable_l4_enabled to output mmu type in cpuinfo Alexandre Ghiti
2021-01-04 19:58 ` Alexandre Ghiti [this message]
2021-01-04 19:58 ` [RFC PATCH 12/12] riscv: Improve virtual kernel memory layout dump Alexandre Ghiti
2021-01-30 9:33 ` [RFC PATCH 00/12] Introduce sv48 support without relocable kernel Alex Ghiti
2021-02-03 3:04 ` Palmer Dabbelt
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