From: Jernej Skrabec <jernej.skrabec@siol.net>
To: robh+dt@kernel.org, mripard@kernel.org, wens@csie.org
Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, jernej.skrabec@siol.net,
linux-sunxi@googlegroups.com
Subject: [PATCH] arm64: dts: allwinner: h5: Add deinterlace node
Date: Wed, 6 Jan 2021 19:25:23 +0100 [thread overview]
Message-ID: <20210106182523.1325796-1-jernej.skrabec@siol.net> (raw)
Deinterlace core is completely compatible to H3.
Add a node for it.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
Note: I didn't add H5 fallback, since the only reason why this node
is not in common H3/H5 dtsi is that it's located on different addresses.
If anyone feel fallback compatible is needed, I'll add it in next revision.
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index 10489e508695..578a63dedf46 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -121,6 +121,19 @@ crypto: crypto@1c15000 {
resets = <&ccu RST_BUS_CE>;
};
+ deinterlace: deinterlace@1e00000 {
+ compatible = "allwinner,sun8i-h3-deinterlace";
+ reg = <0x01e00000 0x20000>;
+ clocks = <&ccu CLK_BUS_DEINTERLACE>,
+ <&ccu CLK_DEINTERLACE>,
+ <&ccu CLK_DRAM_DEINTERLACE>;
+ clock-names = "bus", "mod", "ram";
+ resets = <&ccu RST_BUS_DEINTERLACE>;
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+ interconnects = <&mbus 9>;
+ interconnect-names = "dma-mem";
+ };
+
mali: gpu@1e80000 {
compatible = "allwinner,sun50i-h5-mali", "arm,mali-450";
reg = <0x01e80000 0x30000>;
--
2.30.0
next reply other threads:[~2021-01-06 18:19 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-06 18:25 Jernej Skrabec [this message]
2021-01-07 9:40 ` [PATCH] arm64: dts: allwinner: h5: Add deinterlace node Maxime Ripard
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