From: Zhiqiang Hou <Zhiqiang.Hou@nxp.com>
To: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, lorenzo.pieralisi@arm.com,
robh+dt@kernel.org, bhelgaas@google.com, shawnguo@kernel.org,
leoyang.li@nxp.com, gustavo.pimentel@synopsys.com
Cc: minghuan.Lian@nxp.com, mingkai.hu@nxp.com, roy.zang@nxp.com,
Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Subject: [PATCHv3 3/7] dt-bindings: pci: layerscape-pci: Add a optional property big-endian
Date: Fri, 8 Jan 2021 17:36:06 +0800 [thread overview]
Message-ID: <20210108093610.28595-4-Zhiqiang.Hou@nxp.com> (raw)
In-Reply-To: <20210108093610.28595-1-Zhiqiang.Hou@nxp.com>
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
This property is to indicate the endianness when accessing the
PEX_LUT and PF register block, so if these registers are
implemented in big-endian, specify this property.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
---
V3:
- Rebased against the latest code base
Documentation/devicetree/bindings/pci/layerscape-pci.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
index daa99f7d4c3f..0033c898976e 100644
--- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
+++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
@@ -39,6 +39,10 @@ Required properties:
of the data transferred from/to the IP block. This can avoid the software
cache flush/invalid actions, and improve the performance significantly.
+Optional properties:
+- big-endian: If the PEX_LUT and PF register block is in big-endian, specify
+ this property.
+
Example:
pcie@3400000 {
--
2.17.1
next prev parent reply other threads:[~2021-01-08 9:29 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-08 9:36 [PATCHv3 0/7] PCI: layerscape: Add power management support Zhiqiang Hou
2021-01-08 9:36 ` [PATCHv3 1/7] PCI: dwc: Fix a bug of the case dw_pci->ops is NULL Zhiqiang Hou
2021-01-28 23:22 ` Li Yang
2021-01-08 9:36 ` [PATCHv3 2/7] PCI: layerscape: Change to use the DWC common link-up check function Zhiqiang Hou
2021-01-08 9:36 ` Zhiqiang Hou [this message]
2021-01-08 9:36 ` [PATCHv3 4/7] arm64: dts: layerscape: Add big-endian property for PCIe nodes Zhiqiang Hou
2021-01-08 9:36 ` [PATCHv3 5/7] dt-bindings: pci: layerscape-pci: Update the description of SCFG property Zhiqiang Hou
2021-01-08 9:36 ` [PATCHv3 6/7] arm64: dts: ls1043a: Add SCFG phandle for PCIe nodes Zhiqiang Hou
2021-01-08 9:36 ` [PATCHv3 7/7] PCI: layerscape: Add power management support Zhiqiang Hou
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