[irqchip:,irq/irqchip-next] irqchip/mips-cpu: Set IPI domain parent chip
diff mbox series

Message ID 161027456251.414.3026056291168643147.tip-bot2@tip-bot2
State Accepted
Commit 599b3063adf4bf041a87a69244ee36aded0d878f
Headers show
  • [irqchip:,irq/irqchip-next] irqchip/mips-cpu: Set IPI domain parent chip
Related show

Commit Message

tip-bot2 for Fan Du Jan. 10, 2021, 10:29 a.m. UTC
The following commit has been merged into the irq/irqchip-next branch of irqchip:

Commit-ID:     599b3063adf4bf041a87a69244ee36aded0d878f
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/599b3063adf4bf041a87a69244ee36aded0d878f
Author:        Mathias Kresin <dev@kresin.me>
AuthorDate:    Thu, 07 Jan 2021 22:36:03 +01:00
Committer:     Marc Zyngier <maz@kernel.org>
CommitterDate: Sun, 10 Jan 2021 10:20:24 

irqchip/mips-cpu: Set IPI domain parent chip

Since commit 55567976629e ("genirq/irqdomain: Allow partial trimming of
irq_data hierarchy") the irq_data chain is valided.

The irq_domain_trim_hierarchy() function doesn't consider the irq + ipi
domain hierarchy as valid, since the ipi domain has the irq domain set
as parent, but the parent domain has no chip set. Hence the boot ends in
a kernel panic.

Set the chip for the parent domain as it is done in the mips gic irq
driver, to have a valid irq_data chain.

Fixes: 3838a547fda2 ("irqchip: mips-cpu: Introduce IPI IRQ domain support")
Cc: <stable@vger.kernel.org> # v5.10+
Signed-off-by: Mathias Kresin <dev@kresin.me>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210107213603.1637781-1-dev@kresin.me
 drivers/irqchip/irq-mips-cpu.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff mbox series

diff --git a/drivers/irqchip/irq-mips-cpu.c b/drivers/irqchip/irq-mips-cpu.c
index 95d4fd8..0bbb0b2 100644
--- a/drivers/irqchip/irq-mips-cpu.c
+++ b/drivers/irqchip/irq-mips-cpu.c
@@ -197,6 +197,13 @@  static int mips_cpu_ipi_alloc(struct irq_domain *domain, unsigned int virq,
 		if (ret)
 			return ret;
+		ret = irq_domain_set_hwirq_and_chip(domain->parent, virq + i, hwirq,
+						    &mips_mt_cpu_irq_controller,
+						    NULL);
+		if (ret)
+			return ret;
 		ret = irq_set_irq_type(virq + i, IRQ_TYPE_LEVEL_HIGH);
 		if (ret)
 			return ret;