From: Steen Hegelund <steen.hegelund@microchip.com>
To: Philipp Zabel <p.zabel@pengutronix.de>, Rob Herring <robh+dt@kernel.org>
Cc: Steen Hegelund <steen.hegelund@microchip.com>,
Andrew Lunn <andrew@lunn.ch>,
Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
Gregory Clement <gregory.clement@bootlin.com>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>
Subject: [PATCH v3 1/3] dt-bindings: reset: microchip sparx5 reset driver bindings
Date: Thu, 14 Jan 2021 17:24:30 +0100 [thread overview]
Message-ID: <20210114162432.3039657-2-steen.hegelund@microchip.com> (raw)
In-Reply-To: <20210114162432.3039657-1-steen.hegelund@microchip.com>
Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
---
.../bindings/reset/microchip,rst.yaml | 59 +++++++++++++++++++
1 file changed, 59 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/microchip,rst.yaml
diff --git a/Documentation/devicetree/bindings/reset/microchip,rst.yaml b/Documentation/devicetree/bindings/reset/microchip,rst.yaml
new file mode 100644
index 000000000000..af01016e246f
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/microchip,rst.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/reset/microchip,rst.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Microchip Sparx5 Switch Reset Controller
+
+maintainers:
+ - Steen Hegelund <steen.hegelund@microchip.com>
+ - Lars Povlsen <lars.povlsen@microchip.com>
+
+description: |
+ The Microchip Sparx5 Switch provides reset control and implements the following
+ functions
+ - One Time Switch Core Reset (Soft Reset)
+
+properties:
+ $nodename:
+ pattern: "^reset-controller@[0-9a-f]+$"
+
+ compatible:
+ const: microchip,sparx5-switch-reset
+
+ reg:
+ maxItems: 1
+
+ "#reset-cells":
+ const: 1
+
+ cpu-syscon:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: syscon used to access CPU reset
+ maxItems: 1
+
+ gcb-syscon:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: syscon used to access Global Control Block
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - "#reset-cells"
+ - cpu-syscon
+ - gcb-syscon
+
+additionalProperties: false
+
+examples:
+ - |
+ reset: reset-controller@0 {
+ compatible = "microchip,sparx5-switch-reset";
+ reg = <0x0 0x0>;
+ #reset-cells = <1>;
+ cpu-syscon = <&cpu_ctrl>;
+ gcb-syscon = <&gcb_ctrl>;
+ };
+
--
2.29.2
next prev parent reply other threads:[~2021-01-14 16:26 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-14 16:24 [PATCH v3 0/3] Adding the Sparx5 Switch Reset Driver Steen Hegelund
2021-01-14 16:24 ` Steen Hegelund [this message]
2021-01-19 20:35 ` [PATCH v3 1/3] dt-bindings: reset: microchip sparx5 reset driver bindings Alexandre Belloni
2021-01-20 7:51 ` Steen.Hegelund
2021-01-14 16:24 ` [PATCH v3 2/3] reset: mchp: sparx5: add switch reset driver Steen Hegelund
2021-01-19 20:37 ` Alexandre Belloni
2021-01-19 20:39 ` Alexandre Belloni
2021-01-20 7:53 ` Steen Hegelund
2021-01-14 16:24 ` [PATCH v3 3/3] arm64: dts: reset: add microchip sparx5 " Steen Hegelund
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