[PATCH v4 3/3] PCI: xgene-msi: Fix race in installing chained irq handler

From: Martin Kaiser <martin@kaiser.cx>
To: Bjorn Helgaas <helgaas@kernel.org>,
	Ley Foon Tan <ley.foon.tan@intel.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
	Jingoo Han <jingoohan1@gmail.com>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Toan Le <toan@os.amperecomputing.com>,
	Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	Martin Kaiser <martin@kaiser.cx>
Subject: [PATCH v4 3/3] PCI: xgene-msi: Fix race in installing chained irq handler
Date: Fri, 15 Jan 2021 22:24:35 +0100	[thread overview]
Message-ID: <20210115212435.19940-3-martin@kaiser.cx> (raw)
In-Reply-To: <20210115212435.19940-1-martin@kaiser.cx>

Fix a race where a pending interrupt could be received and the handler
called before the handler's data has been setup, by converting to
irq_set_chained_handler_and_data().

See also 2cf5a03cb29d ("PCI/keystone: Fix race in installing chained IRQ
handler").

Based on the mail discussion, it seems ok to drop the error handling.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
v4
 - resend after two months

 drivers/pci/controller/pci-xgene-msi.c | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/pci/controller/pci-xgene-msi.c b/drivers/pci/controller/pci-xgene-msi.c
index 2470782cb01a..1c34c897a7e2 100644
--- a/drivers/pci/controller/pci-xgene-msi.c
+++ b/drivers/pci/controller/pci-xgene-msi.c
@@ -384,13 +384,9 @@ static int xgene_msi_hwirq_alloc(unsigned int cpu)
 		if (!msi_group->gic_irq)
 			continue;
 
-		irq_set_chained_handler(msi_group->gic_irq,
-					xgene_msi_isr);
-		err = irq_set_handler_data(msi_group->gic_irq, msi_group);
-		if (err) {
-			pr_err("failed to register GIC IRQ handler\n");
-			return -EINVAL;
-		}
+		irq_set_chained_handler_and_data(msi_group->gic_irq,
+			xgene_msi_isr, msi_group);
+
 		/*
 		 * Statically allocate MSI GIC IRQs to each CPU core.
 		 * With 8-core X-Gene v1, 2 MSI GIC IRQs are allocated
-- 
2.20.1

