[v4] drivers/soc/litex: Add restart handler
diff mbox series

Message ID 20210119080938.1832733-1-geert@linux-m68k.org
State Accepted
Commit 3706f9f76a4f79f8e7b2eb8b99877e89fe9ad732
Headers show
Series
  • [v4] drivers/soc/litex: Add restart handler
Related show

Commit Message

Geert Uytterhoeven Jan. 19, 2021, 8:09 a.m. UTC
Let the LiteX SoC Controller register a restart handler, which resets
the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
---
v4:
  - Drop bogus "a" from description,
  - Get rid of static litex_soc_ctrl_device and litex_reset_nb
    instances,
  - Unregister handler on driver unbind,

v3:
  - Rebase on top of openrisc/for-next,

v2:
  - Rebase on top of v5.11-rc1,
  - Change reset handler priority to recommended default value of 128
    (was 192).

(v1 was not sent to a mailing list)
---
 drivers/soc/litex/litex_soc_ctrl.c | 42 +++++++++++++++++++++++++++++-
 1 file changed, 41 insertions(+), 1 deletion(-)

Comments

Anup Patel Jan. 19, 2021, 8:17 a.m. UTC | #1
Hi,

On Tue, Jan 19, 2021 at 1:40 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Let the LiteX SoC Controller register a restart handler, which resets
> the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
>
> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>

We have SBI System Reset Extension (SRST) in upcoming
SBI v0.3 spec. Using this SBI extension, you will not require a
dedicated reboot driver for various projects such as Linux kernel,
U-Boot, EDK2, FreeBSD kernel, etc.

The OpenSBI v0.9 (released yesterday) already has SBI SRST
extension implemented so we will just need platform hooks for
LiteX.

The Linux support for SRST extension is already available on
LKML so far no comments: https://lkml.org/lkml/2020/11/25/6

Regards,
Anup


> ---
> v4:
>   - Drop bogus "a" from description,
>   - Get rid of static litex_soc_ctrl_device and litex_reset_nb
>     instances,
>   - Unregister handler on driver unbind,
>
> v3:
>   - Rebase on top of openrisc/for-next,
>
> v2:
>   - Rebase on top of v5.11-rc1,
>   - Change reset handler priority to recommended default value of 128
>     (was 192).
>
> (v1 was not sent to a mailing list)
> ---
>  drivers/soc/litex/litex_soc_ctrl.c | 42 +++++++++++++++++++++++++++++-
>  1 file changed, 41 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/soc/litex/litex_soc_ctrl.c b/drivers/soc/litex/litex_soc_ctrl.c
> index da17ba56b7956c84..a7dd5be9fd5bd8ad 100644
> --- a/drivers/soc/litex/litex_soc_ctrl.c
> +++ b/drivers/soc/litex/litex_soc_ctrl.c
> @@ -15,6 +15,11 @@
>  #include <linux/module.h>
>  #include <linux/errno.h>
>  #include <linux/io.h>
> +#include <linux/reboot.h>
> +
> +/* reset register located at the base address */
> +#define RESET_REG_OFF           0x00
> +#define RESET_REG_VALUE         0x00000001
>
>  #define SCRATCH_REG_OFF         0x04
>  #define SCRATCH_REG_VALUE       0x12345678
> @@ -66,8 +71,19 @@ static int litex_check_csr_access(void __iomem *reg_addr)
>
>  struct litex_soc_ctrl_device {
>         void __iomem *base;
> +       struct notifier_block reset_nb;
>  };
>
> +static int litex_reset_handler(struct notifier_block *this, unsigned long mode,
> +                              void *cmd)
> +{
> +       struct litex_soc_ctrl_device *soc_ctrl_dev =
> +               container_of(this, struct litex_soc_ctrl_device, reset_nb);
> +
> +       litex_write32(soc_ctrl_dev->base + RESET_REG_OFF, RESET_REG_VALUE);
> +       return NOTIFY_DONE;
> +}
> +
>  static const struct of_device_id litex_soc_ctrl_of_match[] = {
>         {.compatible = "litex,soc-controller"},
>         {},
> @@ -78,6 +94,7 @@ MODULE_DEVICE_TABLE(of, litex_soc_ctrl_of_match);
>  static int litex_soc_ctrl_probe(struct platform_device *pdev)
>  {
>         struct litex_soc_ctrl_device *soc_ctrl_dev;
> +       int error;
>
>         soc_ctrl_dev = devm_kzalloc(&pdev->dev, sizeof(*soc_ctrl_dev), GFP_KERNEL);
>         if (!soc_ctrl_dev)
> @@ -87,7 +104,29 @@ static int litex_soc_ctrl_probe(struct platform_device *pdev)
>         if (IS_ERR(soc_ctrl_dev->base))
>                 return PTR_ERR(soc_ctrl_dev->base);
>
> -       return litex_check_csr_access(soc_ctrl_dev->base);
> +       error = litex_check_csr_access(soc_ctrl_dev->base);
> +       if (error)
> +               return error;
> +
> +       platform_set_drvdata(pdev, soc_ctrl_dev);
> +
> +       soc_ctrl_dev->reset_nb.notifier_call = litex_reset_handler;
> +       soc_ctrl_dev->reset_nb.priority = 128;
> +       error = register_restart_handler(&soc_ctrl_dev->reset_nb);
> +       if (error) {
> +               dev_warn(&pdev->dev, "cannot register restart handler: %d\n",
> +                        error);
> +       }
> +
> +       return 0;
> +}
> +
> +static int litex_soc_ctrl_remove(struct platform_device *pdev)
> +{
> +       struct litex_soc_ctrl_device *soc_ctrl_dev = platform_get_drvdata(pdev);
> +
> +       unregister_restart_handler(&soc_ctrl_dev->reset_nb);
> +       return 0;
>  }
>
>  static struct platform_driver litex_soc_ctrl_driver = {
> @@ -96,6 +135,7 @@ static struct platform_driver litex_soc_ctrl_driver = {
>                 .of_match_table = of_match_ptr(litex_soc_ctrl_of_match)
>         },
>         .probe = litex_soc_ctrl_probe,
> +       .remove = litex_soc_ctrl_remove,
>  };
>
>  module_platform_driver(litex_soc_ctrl_driver);
> --
> 2.25.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
Stafford Horne Jan. 19, 2021, 9:34 p.m. UTC | #2
On Tue, Jan 19, 2021 at 09:09:38AM +0100, Geert Uytterhoeven wrote:
> Let the LiteX SoC Controller register a restart handler, which resets
> the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
> 
> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>

Thanks, this looks good to me, queued to my linux-next branch.

-Stafford

> @@ -66,8 +71,19 @@ static int litex_check_csr_access(void __iomem *reg_addr)
>  
>  struct litex_soc_ctrl_device {
>  	void __iomem *base;
> +	struct notifier_block reset_nb;
>  };
>  
> +static int litex_reset_handler(struct notifier_block *this, unsigned long mode,
> +			       void *cmd)
> +{
> +	struct litex_soc_ctrl_device *soc_ctrl_dev =
> +		container_of(this, struct litex_soc_ctrl_device, reset_nb);

Nice.

> +	litex_write32(soc_ctrl_dev->base + RESET_REG_OFF, RESET_REG_VALUE);
> +	return NOTIFY_DONE;
> +}
> +
Stafford Horne Jan. 19, 2021, 10:11 p.m. UTC | #3
On Wed, Jan 20, 2021 at 06:34:44AM +0900, Stafford Horne wrote:
> On Tue, Jan 19, 2021 at 09:09:38AM +0100, Geert Uytterhoeven wrote:
> > Let the LiteX SoC Controller register a restart handler, which resets
> > the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
> > 
> > Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
> 
> Thanks, this looks good to me, queued to my linux-next branch.
> 
> -Stafford
> 
> > @@ -66,8 +71,19 @@ static int litex_check_csr_access(void __iomem *reg_addr)
> >  
> >  struct litex_soc_ctrl_device {
> >  	void __iomem *base;
> > +	struct notifier_block reset_nb;
> >  };
> >  
> > +static int litex_reset_handler(struct notifier_block *this, unsigned long mode,
> > +			       void *cmd)
> > +{
> > +	struct litex_soc_ctrl_device *soc_ctrl_dev =
> > +		container_of(this, struct litex_soc_ctrl_device, reset_nb);
> 
> Nice.
> 
> > +	litex_write32(soc_ctrl_dev->base + RESET_REG_OFF, RESET_REG_VALUE);
> > +	return NOTIFY_DONE;
> > +}
> > +

Actually, I tested this out on the latest (2-weeks ago) Litex and
openrisc/for-next and it didn't seem to work correctly.

I will look into it a bit closer, but if you see or can think of anything let
me know.  Note There are a few failures below related to network services as my
for-next kernel doesnt have a network driver (yet).

Using my buildroot rootfs: http://shorne.noip.me/downloads/or1k-glibc-rootfs.cpio.gz

    # shutdown -r now

    Broadcast message from root@buildroot (console) (Thu Jan  1 00:00:48 1970):
    The system is going down for reboot NOW!
    INIT: Switching to runlevel: 6
    # mounting home work nfs ...
    mount: mounting 10.0.0.27:/home/shorne/work on /home/shorne/work failed: No such device
    enabling login for shorne ...
    setting coredumps ...
    Stopping dropbear sshd: FAIL
    Stopping ntpd: FAIL
    Nothing to do, sntp is not a daemon.
    Stopping network: ifdown: interface lo not configured
    ifdown: interface eth0 not configured
    OK
    Saving random seed: [   52.020000] random: dd: uninitialized urandom read (512 bytes read)
    OK
    Stopping klogd: OK
    Stopping syslogd: start-stop-daemon: warning: killing process 51: No such process
    FAIL
    umount: devtmpfs busy - remounted read-only
    umount: can't unmount /: Invalid argument
    [   53.710000] reboot: Restarting system
    [   54.710000] Reboot failed -- System halted
    [   76.040000] watchdog: BUG: soft lockup - CPU#0 stuck for 22s! [reboot:131]
    [   76.040000] CPU: 0 PID: 131 Comm: reboot Not tainted 5.11.0-rc1-00009-gff28dae0bc90 #418
    [   76.040000] CPU #: 0
    [   76.040000]    PC: c00050b8    SR: 0000827f    SP: c180fdb0
    [   76.040000] GPR00: 00000000 GPR01: c180fdb0 GPR02: c180fdc0 GPR03: 0000827f
    [   76.040000] GPR04: c0348944 GPR05: 00000000 GPR06: c180fc70 GPR07: 00000000
    [   76.040000] GPR08: c180fdb0 GPR09: c00050b8 GPR10: c180e000 GPR11: 0000001e
    [   76.040000] GPR12: 00000000 GPR13: 00000020 GPR14: 00000001 GPR15: 00000000
    [   76.040000] GPR16: 00000000 GPR17: c02e48d4 GPR18: 00418958 GPR19: c02e48d4
    [   76.040000] GPR20: 00000000 GPR21: 00000000 GPR22: c02e4018 GPR23: fffffffe
    [   76.040000] GPR24: ffffffff GPR25: 00000000 GPR26: 00000000 GPR27: 00000000
    [   76.040000] GPR28: 00000000 GPR29: ffffffff GPR30: 00000000 GPR31: ffffffff
    [   76.040000]   RES: 0000001e oGPR11: ffffffff
    [   76.040000] Process reboot (pid: 131, stackpage=c180a000)
    [   76.040000]
    [   76.040000] Stack:
    [   76.040000] Call trace:
    [   76.040000] [<(ptrval)>] machine_restart+0x44/0x5c
    [   76.040000] [<(ptrval)>] kernel_restart+0x78/0xa4
    [   76.040000] [<(ptrval)>] ? mutex_lock+0x24/0x50
    [   76.040000] [<(ptrval)>] __do_sys_reboot+0x1a8/0x21c
    [   76.040000] [<(ptrval)>] ? do_filp_open+0x40/0xa0
    [   76.040000] [<(ptrval)>] ? slab_free_freelist_hook+0x6c/0x14c
    [   76.040000] [<(ptrval)>] ? arch_local_irq_save+0x24/0x3c
    [   76.040000] [<(ptrval)>] ? kmem_cache_free+0x130/0x194
    [   76.040000] [<(ptrval)>] ? call_rcu+0x50/0x8c
    [   76.040000] [<(ptrval)>] ? __fput+0x2d0/0x2f4
    [   76.040000] [<(ptrval)>] ? do_sys_openat2+0xd8/0x134
    [   76.040000] [<(ptrval)>] ? task_work_run+0xbc/0xf4
    [   76.040000] [<(ptrval)>] ? do_work_pending+0x60/0x12c
    [   76.040000] [<(ptrval)>] sys_reboot+0x14/0x24
    [   76.040000] [<(ptrval)>] ? _syscall_return+0x0/0x4


-Stafford
Geert Uytterhoeven Jan. 20, 2021, 8:20 a.m. UTC | #4
Hi Stafford,

On Tue, Jan 19, 2021 at 11:11 PM Stafford Horne <shorne@gmail.com> wrote:
> On Wed, Jan 20, 2021 at 06:34:44AM +0900, Stafford Horne wrote:
> > On Tue, Jan 19, 2021 at 09:09:38AM +0100, Geert Uytterhoeven wrote:
> > > Let the LiteX SoC Controller register a restart handler, which resets
> > > the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
> > >
> > > Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
> >
> > Thanks, this looks good to me, queued to my linux-next branch.
> >
> > -Stafford
> >
> > > @@ -66,8 +71,19 @@ static int litex_check_csr_access(void __iomem *reg_addr)
> > >
> > >  struct litex_soc_ctrl_device {
> > >     void __iomem *base;
> > > +   struct notifier_block reset_nb;
> > >  };
> > >
> > > +static int litex_reset_handler(struct notifier_block *this, unsigned long mode,
> > > +                          void *cmd)
> > > +{
> > > +   struct litex_soc_ctrl_device *soc_ctrl_dev =
> > > +           container_of(this, struct litex_soc_ctrl_device, reset_nb);
> >
> > Nice.
> >
> > > +   litex_write32(soc_ctrl_dev->base + RESET_REG_OFF, RESET_REG_VALUE);
> > > +   return NOTIFY_DONE;
> > > +}
> > > +
>
> Actually, I tested this out on the latest (2-weeks ago) Litex and
> openrisc/for-next and it didn't seem to work correctly.
>
> I will look into it a bit closer, but if you see or can think of anything let
> me know.  Note There are a few failures below related to network services as my
> for-next kernel doesnt have a network driver (yet).

Hmmm, openrisc/for-next does have commit 131172a4a8ce3fcc ("openrisc:
restart: Call common handlers before hanging").

It's been a few years I used an OpenRISC setup.
Do you have a link to Linux on mor1kx/LiteX setup instructions?

>
> Using my buildroot rootfs: http://shorne.noip.me/downloads/or1k-glibc-rootfs.cpio.gz
>
>     # shutdown -r now
>
>     Broadcast message from root@buildroot (console) (Thu Jan  1 00:00:48 1970):
>     The system is going down for reboot NOW!
>     INIT: Switching to runlevel: 6
>     # mounting home work nfs ...
>     mount: mounting 10.0.0.27:/home/shorne/work on /home/shorne/work failed: No such device
>     enabling login for shorne ...
>     setting coredumps ...
>     Stopping dropbear sshd: FAIL
>     Stopping ntpd: FAIL
>     Nothing to do, sntp is not a daemon.
>     Stopping network: ifdown: interface lo not configured
>     ifdown: interface eth0 not configured
>     OK
>     Saving random seed: [   52.020000] random: dd: uninitialized urandom read (512 bytes read)
>     OK
>     Stopping klogd: OK
>     Stopping syslogd: start-stop-daemon: warning: killing process 51: No such process
>     FAIL
>     umount: devtmpfs busy - remounted read-only
>     umount: can't unmount /: Invalid argument
>     [   53.710000] reboot: Restarting system
>     [   54.710000] Reboot failed -- System halted
>     [   76.040000] watchdog: BUG: soft lockup - CPU#0 stuck for 22s! [reboot:131]
>     [   76.040000] CPU: 0 PID: 131 Comm: reboot Not tainted 5.11.0-rc1-00009-gff28dae0bc90 #418
>     [   76.040000] CPU #: 0
>     [   76.040000]    PC: c00050b8    SR: 0000827f    SP: c180fdb0
>     [   76.040000] GPR00: 00000000 GPR01: c180fdb0 GPR02: c180fdc0 GPR03: 0000827f
>     [   76.040000] GPR04: c0348944 GPR05: 00000000 GPR06: c180fc70 GPR07: 00000000
>     [   76.040000] GPR08: c180fdb0 GPR09: c00050b8 GPR10: c180e000 GPR11: 0000001e
>     [   76.040000] GPR12: 00000000 GPR13: 00000020 GPR14: 00000001 GPR15: 00000000
>     [   76.040000] GPR16: 00000000 GPR17: c02e48d4 GPR18: 00418958 GPR19: c02e48d4
>     [   76.040000] GPR20: 00000000 GPR21: 00000000 GPR22: c02e4018 GPR23: fffffffe
>     [   76.040000] GPR24: ffffffff GPR25: 00000000 GPR26: 00000000 GPR27: 00000000
>     [   76.040000] GPR28: 00000000 GPR29: ffffffff GPR30: 00000000 GPR31: ffffffff
>     [   76.040000]   RES: 0000001e oGPR11: ffffffff
>     [   76.040000] Process reboot (pid: 131, stackpage=c180a000)
>     [   76.040000]
>     [   76.040000] Stack:
>     [   76.040000] Call trace:
>     [   76.040000] [<(ptrval)>] machine_restart+0x44/0x5c
>     [   76.040000] [<(ptrval)>] kernel_restart+0x78/0xa4
>     [   76.040000] [<(ptrval)>] ? mutex_lock+0x24/0x50
>     [   76.040000] [<(ptrval)>] __do_sys_reboot+0x1a8/0x21c
>     [   76.040000] [<(ptrval)>] ? do_filp_open+0x40/0xa0
>     [   76.040000] [<(ptrval)>] ? slab_free_freelist_hook+0x6c/0x14c
>     [   76.040000] [<(ptrval)>] ? arch_local_irq_save+0x24/0x3c
>     [   76.040000] [<(ptrval)>] ? kmem_cache_free+0x130/0x194
>     [   76.040000] [<(ptrval)>] ? call_rcu+0x50/0x8c
>     [   76.040000] [<(ptrval)>] ? __fput+0x2d0/0x2f4
>     [   76.040000] [<(ptrval)>] ? do_sys_openat2+0xd8/0x134
>     [   76.040000] [<(ptrval)>] ? task_work_run+0xbc/0xf4
>     [   76.040000] [<(ptrval)>] ? do_work_pending+0x60/0x12c
>     [   76.040000] [<(ptrval)>] sys_reboot+0x14/0x24
>     [   76.040000] [<(ptrval)>] ? _syscall_return+0x0/0x4
>
>
> -Stafford
Geert Uytterhoeven Jan. 20, 2021, 8:21 a.m. UTC | #5
Hi Anup,

On Tue, Jan 19, 2021 at 9:18 AM Anup Patel <anup@brainfault.org> wrote:
> On Tue, Jan 19, 2021 at 1:40 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > Let the LiteX SoC Controller register a restart handler, which resets
> > the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
> >
> > Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
>
> We have SBI System Reset Extension (SRST) in upcoming
> SBI v0.3 spec. Using this SBI extension, you will not require a
> dedicated reboot driver for various projects such as Linux kernel,
> U-Boot, EDK2, FreeBSD kernel, etc.
>
> The OpenSBI v0.9 (released yesterday) already has SBI SRST
> extension implemented so we will just need platform hooks for
> LiteX.
>
> The Linux support for SRST extension is already available on
> LKML so far no comments: https://lkml.org/lkml/2020/11/25/6

Thanks, that would cover RISC-V.
But what about other users of LiteX, like openrisc and powerpc?

Gr{oetje,eeting}s,

                        Geert
Stafford Horne Jan. 20, 2021, 1:06 p.m. UTC | #6
On Wed, Jan 20, 2021 at 09:20:39AM +0100, Geert Uytterhoeven wrote:
> Hi Stafford,
> 
> On Tue, Jan 19, 2021 at 11:11 PM Stafford Horne <shorne@gmail.com> wrote:
> > On Wed, Jan 20, 2021 at 06:34:44AM +0900, Stafford Horne wrote:
> > > On Tue, Jan 19, 2021 at 09:09:38AM +0100, Geert Uytterhoeven wrote:
> > > > Let the LiteX SoC Controller register a restart handler, which resets
> > > > the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
> > > >
> > > > Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
> > >
> > > Thanks, this looks good to me, queued to my linux-next branch.
> > >
> > > -Stafford
> > >
> > > > @@ -66,8 +71,19 @@ static int litex_check_csr_access(void __iomem *reg_addr)
> > > >
> > > >  struct litex_soc_ctrl_device {
> > > >     void __iomem *base;
> > > > +   struct notifier_block reset_nb;
> > > >  };
> > > >
> > > > +static int litex_reset_handler(struct notifier_block *this, unsigned long mode,
> > > > +                          void *cmd)
> > > > +{
> > > > +   struct litex_soc_ctrl_device *soc_ctrl_dev =
> > > > +           container_of(this, struct litex_soc_ctrl_device, reset_nb);
> > >
> > > Nice.
> > >
> > > > +   litex_write32(soc_ctrl_dev->base + RESET_REG_OFF, RESET_REG_VALUE);
> > > > +   return NOTIFY_DONE;
> > > > +}
> > > > +
> >
> > Actually, I tested this out on the latest (2-weeks ago) Litex and
> > openrisc/for-next and it didn't seem to work correctly.
> >
> > I will look into it a bit closer, but if you see or can think of anything let
> > me know.  Note There are a few failures below related to network services as my
> > for-next kernel doesnt have a network driver (yet).
> 
> Hmmm, openrisc/for-next does have commit 131172a4a8ce3fcc ("openrisc:
> restart: Call common handlers before hanging").
> 
> It's been a few years I used an OpenRISC setup.
> Do you have a link to Linux on mor1kx/LiteX setup instructions?

Actually, I rebuilt everything again and it works fine.  FYI, my instructions
for setup are here:

 - https://github.com/stffrdhrn/or1k-utils/tree/master/litex

I use an arty dev board, you can see the reset working below. There are some
things I need to fix in my dev rootfs shutdown scripts but it does reset.


    # shutdown -r now

    Broadcast message from root@buildroot (console) (Thu Jan  1 00:01:07 1970):
    The system is going down for reboot NOW!
    INIT: Switching to runlevel: 6
    # mounting home work nfs ...
    mount: mounting 10.0.0.27:/home/shorne/work on /home/shorne/work failed: No such device
    enabling login for shorne ...
    setting coredumps ...
    Stopping dropbear sshd: FAIL
    Stopping ntpd: FAIL
    Nothing to do, sntp is not a daemon.
    Stopping network: ifdown: interface lo not configured
    ifdown: interface eth0 not configured
    OK
    Saving random seed: [   70.960000] random: dd: uninitialized urandom read (512 bytes read)
    OK
    Stopping klogd: OK
    Stopping syslogd: start-stop-daemon: warning: killing process 51: No such
    process
    FAIL
    umount: devtmpfs busy - remounted read-only
    umount: can't unmount /: Invalid argument
    [   72.650000] reboot: Res
	    __   _ __      _  __
	   / /  (_) /____ | |/_/
	  / /__/ / __/ -_)>  <
	 /____/_/\__/\__/_/|_|
       Build your hardware, easily!

     (c) Copyright 2012-2020 Enjoy-Digital
     (c) Copyright 2007-2015 M-Labs

     BIOS built on Jan 20 2021 21:18:10
     BIOS CRC passed (b12f1de3)

     Migen git sha1: 40b1092
     LiteX git sha1: 57289dd4

    --=============== SoC ==================--
    CPU:            MOR1KX @ 100MHz
    BUS:            WISHBONE 32-bit @ 4GiB

-Stafford
Joel Stanley Jan. 20, 2021, 9:46 p.m. UTC | #7
On Tue, 19 Jan 2021 at 08:14, Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Let the LiteX SoC Controller register a restart handler, which resets
> the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
>
> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>

Reviewed-by: Joel Stanley <joel@jms.id.au>

> ---
> v4:
>   - Drop bogus "a" from description,
>   - Get rid of static litex_soc_ctrl_device and litex_reset_nb
>     instances,
>   - Unregister handler on driver unbind,
>
> v3:
>   - Rebase on top of openrisc/for-next,
>
> v2:
>   - Rebase on top of v5.11-rc1,
>   - Change reset handler priority to recommended default value of 128
>     (was 192).
>
> (v1 was not sent to a mailing list)
> ---
>  drivers/soc/litex/litex_soc_ctrl.c | 42 +++++++++++++++++++++++++++++-
>  1 file changed, 41 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/soc/litex/litex_soc_ctrl.c b/drivers/soc/litex/litex_soc_ctrl.c
> index da17ba56b7956c84..a7dd5be9fd5bd8ad 100644
> --- a/drivers/soc/litex/litex_soc_ctrl.c
> +++ b/drivers/soc/litex/litex_soc_ctrl.c
> @@ -15,6 +15,11 @@
>  #include <linux/module.h>
>  #include <linux/errno.h>
>  #include <linux/io.h>
> +#include <linux/reboot.h>
> +
> +/* reset register located at the base address */
> +#define RESET_REG_OFF           0x00
> +#define RESET_REG_VALUE         0x00000001
>
>  #define SCRATCH_REG_OFF         0x04
>  #define SCRATCH_REG_VALUE       0x12345678
> @@ -66,8 +71,19 @@ static int litex_check_csr_access(void __iomem *reg_addr)
>
>  struct litex_soc_ctrl_device {
>         void __iomem *base;
> +       struct notifier_block reset_nb;
>  };
>
> +static int litex_reset_handler(struct notifier_block *this, unsigned long mode,
> +                              void *cmd)
> +{
> +       struct litex_soc_ctrl_device *soc_ctrl_dev =
> +               container_of(this, struct litex_soc_ctrl_device, reset_nb);
> +
> +       litex_write32(soc_ctrl_dev->base + RESET_REG_OFF, RESET_REG_VALUE);
> +       return NOTIFY_DONE;
> +}
> +
>  static const struct of_device_id litex_soc_ctrl_of_match[] = {
>         {.compatible = "litex,soc-controller"},
>         {},
> @@ -78,6 +94,7 @@ MODULE_DEVICE_TABLE(of, litex_soc_ctrl_of_match);
>  static int litex_soc_ctrl_probe(struct platform_device *pdev)
>  {
>         struct litex_soc_ctrl_device *soc_ctrl_dev;
> +       int error;
>
>         soc_ctrl_dev = devm_kzalloc(&pdev->dev, sizeof(*soc_ctrl_dev), GFP_KERNEL);
>         if (!soc_ctrl_dev)
> @@ -87,7 +104,29 @@ static int litex_soc_ctrl_probe(struct platform_device *pdev)
>         if (IS_ERR(soc_ctrl_dev->base))
>                 return PTR_ERR(soc_ctrl_dev->base);
>
> -       return litex_check_csr_access(soc_ctrl_dev->base);
> +       error = litex_check_csr_access(soc_ctrl_dev->base);
> +       if (error)
> +               return error;
> +
> +       platform_set_drvdata(pdev, soc_ctrl_dev);
> +
> +       soc_ctrl_dev->reset_nb.notifier_call = litex_reset_handler;
> +       soc_ctrl_dev->reset_nb.priority = 128;
> +       error = register_restart_handler(&soc_ctrl_dev->reset_nb);
> +       if (error) {
> +               dev_warn(&pdev->dev, "cannot register restart handler: %d\n",
> +                        error);
> +       }
> +
> +       return 0;
> +}
> +
> +static int litex_soc_ctrl_remove(struct platform_device *pdev)
> +{
> +       struct litex_soc_ctrl_device *soc_ctrl_dev = platform_get_drvdata(pdev);
> +
> +       unregister_restart_handler(&soc_ctrl_dev->reset_nb);
> +       return 0;
>  }
>
>  static struct platform_driver litex_soc_ctrl_driver = {
> @@ -96,6 +135,7 @@ static struct platform_driver litex_soc_ctrl_driver = {
>                 .of_match_table = of_match_ptr(litex_soc_ctrl_of_match)
>         },
>         .probe = litex_soc_ctrl_probe,
> +       .remove = litex_soc_ctrl_remove,
>  };
>
>  module_platform_driver(litex_soc_ctrl_driver);
> --
> 2.25.1
>

Patch
diff mbox series

diff --git a/drivers/soc/litex/litex_soc_ctrl.c b/drivers/soc/litex/litex_soc_ctrl.c
index da17ba56b7956c84..a7dd5be9fd5bd8ad 100644
--- a/drivers/soc/litex/litex_soc_ctrl.c
+++ b/drivers/soc/litex/litex_soc_ctrl.c
@@ -15,6 +15,11 @@ 
 #include <linux/module.h>
 #include <linux/errno.h>
 #include <linux/io.h>
+#include <linux/reboot.h>
+
+/* reset register located at the base address */
+#define RESET_REG_OFF           0x00
+#define RESET_REG_VALUE         0x00000001
 
 #define SCRATCH_REG_OFF         0x04
 #define SCRATCH_REG_VALUE       0x12345678
@@ -66,8 +71,19 @@  static int litex_check_csr_access(void __iomem *reg_addr)
 
 struct litex_soc_ctrl_device {
 	void __iomem *base;
+	struct notifier_block reset_nb;
 };
 
+static int litex_reset_handler(struct notifier_block *this, unsigned long mode,
+			       void *cmd)
+{
+	struct litex_soc_ctrl_device *soc_ctrl_dev =
+		container_of(this, struct litex_soc_ctrl_device, reset_nb);
+
+	litex_write32(soc_ctrl_dev->base + RESET_REG_OFF, RESET_REG_VALUE);
+	return NOTIFY_DONE;
+}
+
 static const struct of_device_id litex_soc_ctrl_of_match[] = {
 	{.compatible = "litex,soc-controller"},
 	{},
@@ -78,6 +94,7 @@  MODULE_DEVICE_TABLE(of, litex_soc_ctrl_of_match);
 static int litex_soc_ctrl_probe(struct platform_device *pdev)
 {
 	struct litex_soc_ctrl_device *soc_ctrl_dev;
+	int error;
 
 	soc_ctrl_dev = devm_kzalloc(&pdev->dev, sizeof(*soc_ctrl_dev), GFP_KERNEL);
 	if (!soc_ctrl_dev)
@@ -87,7 +104,29 @@  static int litex_soc_ctrl_probe(struct platform_device *pdev)
 	if (IS_ERR(soc_ctrl_dev->base))
 		return PTR_ERR(soc_ctrl_dev->base);
 
-	return litex_check_csr_access(soc_ctrl_dev->base);
+	error = litex_check_csr_access(soc_ctrl_dev->base);
+	if (error)
+		return error;
+
+	platform_set_drvdata(pdev, soc_ctrl_dev);
+
+	soc_ctrl_dev->reset_nb.notifier_call = litex_reset_handler;
+	soc_ctrl_dev->reset_nb.priority = 128;
+	error = register_restart_handler(&soc_ctrl_dev->reset_nb);
+	if (error) {
+		dev_warn(&pdev->dev, "cannot register restart handler: %d\n",
+			 error);
+	}
+
+	return 0;
+}
+
+static int litex_soc_ctrl_remove(struct platform_device *pdev)
+{
+	struct litex_soc_ctrl_device *soc_ctrl_dev = platform_get_drvdata(pdev);
+
+	unregister_restart_handler(&soc_ctrl_dev->reset_nb);
+	return 0;
 }
 
 static struct platform_driver litex_soc_ctrl_driver = {
@@ -96,6 +135,7 @@  static struct platform_driver litex_soc_ctrl_driver = {
 		.of_match_table = of_match_ptr(litex_soc_ctrl_of_match)
 	},
 	.probe = litex_soc_ctrl_probe,
+	.remove = litex_soc_ctrl_remove,
 };
 
 module_platform_driver(litex_soc_ctrl_driver);