From: guoren@kernel.org
To: guoren@kernel.org
Cc: linux-kernel@vger.kernel.org, linux-csky@vger.kernel.org,
Guo Ren <guoren@linux.alibaba.com>
Subject: [PATCH 05/29] csky: Fixup barrier design
Date: Thu, 21 Jan 2021 14:53:25 +0800 [thread overview]
Message-ID: <20210121065349.3188251-5-guoren@kernel.org> (raw)
In-Reply-To: <20210121065349.3188251-1-guoren@kernel.org>
From: Guo Ren <guoren@linux.alibaba.com>
Remove shareable bit for ordering barrier, just keep ordering
in current hart is enough for SMP. Using three continuous
sync.is as PTW barrier to prevent speculative PTW in 860
microarchitecture.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
---
arch/csky/include/asm/barrier.h | 82 ++++++++++++++++++++++++---------
1 file changed, 60 insertions(+), 22 deletions(-)
diff --git a/arch/csky/include/asm/barrier.h b/arch/csky/include/asm/barrier.h
index a430e7fddf35..117e6224defa 100644
--- a/arch/csky/include/asm/barrier.h
+++ b/arch/csky/include/asm/barrier.h
@@ -8,6 +8,61 @@
#define nop() asm volatile ("nop\n":::"memory")
+#ifdef CONFIG_SMP
+
+/*
+ * bar.brwarws: ordering barrier for all load/store instructions
+ * before/after
+ *
+ * |31|30 26|25 21|20 16|15 10|9 5|4 0|
+ * 1 10000 00000 00000 100001 00001 0 bw br aw ar
+ *
+ * b: before
+ * a: after
+ * r: read
+ * w: write
+ *
+ * Here are all combinations:
+ *
+ * bar.brw
+ * bar.br
+ * bar.bw
+ * bar.arw
+ * bar.ar
+ * bar.aw
+ * bar.brwarw
+ * bar.brarw
+ * bar.bwarw
+ * bar.brwar
+ * bar.brwaw
+ * bar.brar
+ * bar.bwaw
+ */
+#define __bar_brw() asm volatile (".long 0x842cc000\n":::"memory")
+#define __bar_br() asm volatile (".long 0x8424c000\n":::"memory")
+#define __bar_bw() asm volatile (".long 0x8428c000\n":::"memory")
+#define __bar_arw() asm volatile (".long 0x8423c000\n":::"memory")
+#define __bar_ar() asm volatile (".long 0x8421c000\n":::"memory")
+#define __bar_aw() asm volatile (".long 0x8422c000\n":::"memory")
+#define __bar_brwarw() asm volatile (".long 0x842fc000\n":::"memory")
+#define __bar_brarw() asm volatile (".long 0x8427c000\n":::"memory")
+#define __bar_bwarw() asm volatile (".long 0x842bc000\n":::"memory")
+#define __bar_brwar() asm volatile (".long 0x842dc000\n":::"memory")
+#define __bar_brwaw() asm volatile (".long 0x842ec000\n":::"memory")
+#define __bar_brar() asm volatile (".long 0x8425c000\n":::"memory")
+#define __bar_brar() asm volatile (".long 0x8425c000\n":::"memory")
+#define __bar_bwaw() asm volatile (".long 0x842ac000\n":::"memory")
+
+#define __smp_mb() __bar_brwarw()
+#define __smp_rmb() __bar_brar()
+#define __smp_wmb() __bar_bwaw()
+
+#define ACQUIRE_FENCE ".long 0x8427c000\n"
+#define __smp_acquire_fence() __bar_brarw()
+#define __smp_release_fence() __bar_brwaw()
+
+#endif /* CONFIG_SMP */
+
/*
* sync: completion barrier, all sync.xx instructions
* guarantee the last response recieved by bus transaction
@@ -15,31 +70,14 @@
* sync.s: inherit from sync, but also shareable to other cores
* sync.i: inherit from sync, but also flush cpu pipeline
* sync.is: the same with sync.i + sync.s
- *
- * bar.brwarw: ordering barrier for all load/store instructions before it
- * bar.brwarws: ordering barrier for all load/store instructions before it
- * and shareable to other cores
- * bar.brar: ordering barrier for all load instructions before it
- * bar.brars: ordering barrier for all load instructions before it
- * and shareable to other cores
- * bar.bwaw: ordering barrier for all store instructions before it
- * bar.bwaws: ordering barrier for all store instructions before it
- * and shareable to other cores
*/
+#define mb() asm volatile ("sync\n":::"memory")
#ifdef CONFIG_CPU_HAS_CACHEV2
-#define mb() asm volatile ("sync.s\n":::"memory")
-
-#ifdef CONFIG_SMP
-#define __smp_mb() asm volatile ("bar.brwarws\n":::"memory")
-#define __smp_rmb() asm volatile ("bar.brars\n":::"memory")
-#define __smp_wmb() asm volatile ("bar.bwaws\n":::"memory")
-#endif /* CONFIG_SMP */
-
-#define sync_is() asm volatile ("sync.is\n":::"memory")
-
-#else /* !CONFIG_CPU_HAS_CACHEV2 */
-#define mb() asm volatile ("sync\n":::"memory")
+/*
+ * Using three sync.is to prevent speculative PTW
+ */
+#define sync_is() asm volatile ("sync.is\nsync.is\nsync.is\n":::"memory")
#endif
#include <asm-generic/barrier.h>
--
2.17.1
next prev parent reply other threads:[~2021-01-21 7:01 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-21 6:53 [PATCH 01/29] csky: Add memory layout 2.5G(user):1.5G(kernel) guoren
2021-01-21 6:53 ` [PATCH 02/29] csky: Fixup perf probe failed guoren
2021-01-21 6:53 ` [PATCH 03/29] csky: Fixup show_regs doesn't contain regs->usp guoren
2021-01-21 6:53 ` [PATCH 04/29] csky: Remove custom asm/atomic.h implementation guoren
2021-01-21 6:53 ` guoren [this message]
2021-01-21 6:53 ` [PATCH 06/29] csky: Fixup futex SMP implementation guoren
2021-01-21 6:53 ` [PATCH 07/29] csky: Fixup asm/cmpxchg.h with correct ordering barrier guoren
2021-01-21 6:53 ` [PATCH 08/29] csky: Cleanup asm/spinlock.h guoren
2021-01-21 6:53 ` [PATCH 09/29] csky: Fixup PTE global for 2.5:1.5 virtual memory guoren
2021-01-21 6:53 ` [PATCH 10/29] csky: Remove prologue of page fault handler in entry.S guoren
2021-01-21 6:53 ` [PATCH 11/29] csky: Add kmemleak support guoren
2021-01-21 6:53 ` [PATCH 12/29] csky: Fix TLB maintenance synchronization problem guoren
2021-01-21 6:53 ` [PATCH 13/29] csky: Add show_tlb for CPU_CK860 debug guoren
2021-01-21 6:53 ` [PATCH 14/29] csky: Fixup FAULT_FLAG_XXX param for handle_mm_fault guoren
2021-01-21 6:53 ` [PATCH 15/29] csky: Fixup update_mmu_cache called with user io mapping guoren
2021-01-21 6:53 ` [PATCH 16/29] csky: Add faulthandler_disabled() check guoren
2021-01-21 6:53 ` [PATCH 17/29] csky: Fixup do_page_fault parent irq status guoren
2021-01-21 6:53 ` [PATCH 18/29] csky: Sync riscv mm/fault.c for easy maintenance guoren
2021-01-21 6:53 ` [PATCH 19/29] csky: mm: abort uaccess retries upon fatal signal guoren
2021-01-21 11:42 ` Mark Rutland
2021-01-21 6:53 ` [PATCH 20/29] csky: Reconstruct VDSO framework guoren
2021-01-21 6:53 ` [PATCH 21/29] csky: Fix a size determination in gpr_get() guoren
2021-01-21 6:53 ` [PATCH 22/29] csky: remove unused including <linux/version.h> guoren
2021-01-21 6:53 ` [PATCH 23/29] csky: Fixup _PAGE_ACCESSED for default pgprot guoren
2021-01-21 6:53 ` [PATCH 24/29] csky: Coding convention del unnecessary definition guoren
2021-01-21 6:53 ` [PATCH 25/29] csky: Fixup swapon guoren
2021-01-21 6:53 ` [PATCH 26/29] csky: kprobe: fix code in simulate without 'long' guoren
2021-01-21 6:53 ` [PATCH 27/29] csky: Add VDSO with GENERIC_GETTIMEOFDAY, GENERIC_TIME_VSYSCALL, HAVE_GENERIC_VDSO guoren
2021-01-21 6:53 ` [PATCH 28/29] csky: Using set_max_mapnr api guoren
2021-01-21 6:53 ` [PATCH 29/29] csky: Fixup pfn_valid error with wrong max_mapnr guoren
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