From: Sia Jee Heng <jee.heng.sia@intel.com>
To: vkoul@kernel.org, Eugeniy.Paltsev@synopsys.com, robh+dt@kernel.org
Cc: andriy.shevchenko@linux.intel.com, jee.heng.sia@intel.com,
dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: [PATCH v12 16/17] dmaengine: dw-axi-dmac: Set constraint to the Max segment size
Date: Mon, 25 Jan 2021 09:32:54 +0800 [thread overview]
Message-ID: <20210125013255.25799-17-jee.heng.sia@intel.com> (raw)
In-Reply-To: <20210125013255.25799-1-jee.heng.sia@intel.com>
Add support for DMA Scatter-Gather (SG) constraint so that DMA clients can
handle the AxiDMA limitation.
Without supporting DMA constraint the default Max segment size reported by
dmaengine is 64KB, which is not supported by Intel KeemBay AxiDMA.
Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
---
drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 8 ++++++++
drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index a1dddec95316..88d4923dee6c 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -12,6 +12,7 @@
#include <linux/device.h>
#include <linux/dmaengine.h>
#include <linux/dmapool.h>
+#include <linux/dma-mapping.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/io.h>
@@ -1340,6 +1341,13 @@ static int dw_probe(struct platform_device *pdev)
dw->dma.device_prep_slave_sg = dw_axi_dma_chan_prep_slave_sg;
dw->dma.device_prep_dma_cyclic = dw_axi_dma_chan_prep_cyclic;
+ /*
+ * Synopsis DesignWare AxiDMA datasheet mentioned Maximum
+ * supported blocks is 1024. Device register width is 4 bytes.
+ * Therefore, set constraint to 1024 * 4.
+ */
+ dw->dma.dev->dma_parms = &dw->dma_parms;
+ dma_set_max_seg_size(&pdev->dev, MAX_BLOCK_SIZE);
platform_set_drvdata(pdev, chip);
pm_runtime_enable(chip->dev);
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
index 3a357f7fda02..1e937ea2a96d 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
@@ -54,6 +54,7 @@ struct axi_dma_chan {
struct dw_axi_dma {
struct dma_device dma;
struct dw_axi_dma_hcfg *hdata;
+ struct device_dma_parameters dma_parms;
/* channels */
struct axi_dma_chan *chan;
--
2.18.0
next prev parent reply other threads:[~2021-01-25 2:06 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-25 1:32 [PATCH v12 00/17] dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA Sia Jee Heng
2021-01-25 1:32 ` [PATCH v12 01/17] dt-bindings: dma: Add YAML schemas for dw-axi-dmac Sia Jee Heng
2021-01-25 1:32 ` [PATCH v12 02/17] dmaengine: dw-axi-dmac: simplify descriptor management Sia Jee Heng
2021-01-25 1:32 ` [PATCH v12 03/17] dmaengine: dw-axi-dmac: move dma_pool_create() to alloc_chan_resources() Sia Jee Heng
2021-01-25 1:32 ` [PATCH v12 04/17] dmaengine: dw-axi-dmac: Add device_synchronize() callback Sia Jee Heng
2021-01-25 1:32 ` [PATCH v12 05/17] dmaengine: dw-axi-dmac: Add device_config operation Sia Jee Heng
2021-01-25 1:32 ` [PATCH v12 06/17] dmaengine: dw-axi-dmac: Support device_prep_slave_sg Sia Jee Heng
2021-01-25 1:32 ` [PATCH v12 07/17] dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic() Sia Jee Heng
2021-01-25 1:32 ` [PATCH v12 08/17] dmaengine: dw-axi-dmac: Support of_dma_controller_register() Sia Jee Heng
2021-01-25 1:32 ` [PATCH v12 09/17] dmaengine: dw-axi-dmac: Support burst residue granularity Sia Jee Heng
2021-01-25 1:32 ` [PATCH v12 10/17] dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA Sia Jee Heng
2021-01-25 1:32 ` [PATCH v12 11/17] dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields Sia Jee Heng
2021-01-25 1:32 ` [PATCH v12 12/17] dmaengine: drivers: Kconfig: add HAS_IOMEM dependency to DW_AXI_DMAC Sia Jee Heng
2021-01-25 1:32 ` [PATCH v12 13/17] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA support Sia Jee Heng
2021-01-25 1:32 ` [PATCH v12 14/17] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshake Sia Jee Heng
2021-01-25 1:32 ` [PATCH v12 15/17] dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD registers Sia Jee Heng
2021-01-25 1:32 ` Sia Jee Heng [this message]
2021-01-25 1:32 ` [PATCH v12 17/17] dmaengine: dw-axi-dmac: Virtually split the linked-list Sia Jee Heng
2021-02-01 9:51 ` [PATCH v12 00/17] dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA Vinod Koul
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