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From: Hsin-Yi Wang <hsinyi@chromium.org>
To: CK Hu <ck.hu@mediatek.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Matthias Brugger <matthias.bgg@gmail.com>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	Mark Rutland <mark.rutland@arm.com>,
	dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org,
	Yongqiang Niu <yongqiang.niu@mediatek.com>
Subject: [PATCH v12 6/8] drm/mediatek: enable dither function
Date: Thu, 28 Jan 2021 19:23:12 +0800	[thread overview]
Message-ID: <20210128112314.1304160-7-hsinyi@chromium.org> (raw)
In-Reply-To: <20210128112314.1304160-1-hsinyi@chromium.org>

From: Yongqiang Niu <yongqiang.niu@mediatek.com>

for 5 or 6 bpc panel, we need enable dither function
to improve the display quality

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index ac2cb25620357..6c8f246380a74 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -53,6 +53,7 @@
 #define DITHER_EN				BIT(0)
 #define DISP_DITHER_CFG				0x0020
 #define DITHER_RELAY_MODE			BIT(0)
+#define DITHER_ENGINE_EN			BIT(1)
 #define DISP_DITHER_SIZE			0x0030
 
 #define LUT_10BIT_MASK				0x03ff
@@ -314,9 +315,19 @@ static void mtk_dither_config(struct device *dev, unsigned int w,
 			      unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
 {
 	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
+	bool enable = (bpc == 5 || bpc == 6);
 
-	mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, DISP_DITHER_SIZE);
-	mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, &priv->cmdq_reg, priv->regs, DISP_DITHER_CFG);
+	if (enable) {
+		mtk_dither_set_common(priv->regs, &priv->cmdq_reg, bpc,
+				      DISP_DITHER_CFG, DITHER_ENGINE_EN,
+				      cmdq_pkt);
+	} else {
+		mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, &priv->cmdq_reg,
+			      priv->regs, DISP_DITHER_CFG);
+	}
+
+	mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs,
+		      DISP_DITHER_SIZE);
 }
 
 static void mtk_dither_start(struct device *dev)
-- 
2.30.0.280.ga3ce27912f-goog


  parent reply	other threads:[~2021-01-28 11:25 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-28 11:23 [PATCH v12 0/8] drm/mediatek: add support for mediatek SOC MT8183 Hsin-Yi Wang
2021-01-28 11:23 ` [PATCH v12 1/8] arm64: dts: mt8183: rename rdma fifo size Hsin-Yi Wang
2021-01-28 16:31   ` Matthias Brugger
2021-01-28 11:23 ` [PATCH v12 2/8] arm64: dts: mt8183: refine gamma compatible name Hsin-Yi Wang
2021-01-28 16:33   ` Matthias Brugger
2021-01-28 11:23 ` [PATCH v12 3/8] drm/mediatek: add mtk_dither_set_common() function Hsin-Yi Wang
2021-01-28 11:23 ` [PATCH v12 4/8] drm/mediatek: separate gamma module Hsin-Yi Wang
2021-01-28 11:23 ` [PATCH v12 5/8] drm/mediatek: add has_dither private data for gamma Hsin-Yi Wang
2021-01-28 11:23 ` Hsin-Yi Wang [this message]
2021-01-29  1:33   ` [PATCH v12 6/8] drm/mediatek: enable dither function CK Hu
2021-01-29  6:24     ` Hsin-Yi Wang
2021-01-29  6:30       ` Yongqiang Niu
2021-01-29  6:46         ` Hsin-Yi Wang
2021-01-29  7:42           ` Yongqiang Niu
2021-01-29  7:59             ` Hsin-Yi Wang
2021-01-28 11:23 ` [PATCH v12 7/8] soc: mediatek: add mtk mutex support for MT8183 Hsin-Yi Wang
2021-01-29  1:11   ` CK Hu
2021-01-28 11:23 ` [PATCH v12 8/8] drm/mediatek: add support for mediatek SOC MT8183 Hsin-Yi Wang

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